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CS42406 数据表(PDF) 4 Page - Cirrus Logic

部件名 CS42406
功能描述  24-BIT, 192kHz 2-IN 6-OUT AUDIO CODEC
PDF  50 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS42406 数据表(HTML) 4 Page - Cirrus Logic

  CS42406 Datasheet HTML 1Page - Cirrus Logic CS42406 Datasheet HTML 2Page - Cirrus Logic CS42406 Datasheet HTML 3Page - Cirrus Logic CS42406 Datasheet HTML 4Page - Cirrus Logic CS42406 Datasheet HTML 5Page - Cirrus Logic CS42406 Datasheet HTML 6Page - Cirrus Logic CS42406 Datasheet HTML 7Page - Cirrus Logic CS42406 Datasheet HTML 8Page - Cirrus Logic CS42406 Datasheet HTML 9Page - Cirrus Logic Next Button
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CS42406
4
DS614PP5
4.10.3 SPI Mode .......................................................................................................... 38
4.10.3a SPI Write ............................................................................................ 38
5. REGISTER QUICK REFERENCE ......................................................................................... 40
6. REGISTER DESCRIPTIONS .................................................................................................. 41
6.1 Mode Control 1 (address 01h) ......................................................................................... 41
6.2 Invert Signal (address 02h).............................................................................................. 42
6.3 Mixing Control Pair 1 (Channels A1 & B1) (address 03h)
Mixing Control Pair 2 (Channels A2 & B2) (address 04h)
Mixing Control Pair 3 (Channels A3 & B3) (address 05h) ............................................. 42
6.4 Volume Control (addresses 06h - 0Bh) ............................................................................ 44
6.5 Mode Control 2 (address 0Ch).......................................................................................... 44
7 PARAMETER DEFINITIONS ................................................................................................... 47
8. PACKAGE DIMENSIONS ....................................................................................................... 48
9. REVISION HISTORY .............................................................................................................. 49
LIST OF FIGURES
Figure 1.
Output Test Load ......................................................................................................... 10
Figure 2.
Maximum Loading ........................................................................................................ 10
Figure 3.
Single-Speed Stopband Rejection ............................................................................... 12
Figure 4.
Single-Speed Transition Band ..................................................................................... 12
Figure 5.
Single-Speed Transition Band (Detail) ......................................................................... 12
Figure 6.
Single-Speed Passband Ripple ................................................................................... 12
Figure 7.
Double-Speed Stopband Rejection .............................................................................. 12
Figure 8.
Double-Speed Transition Band .................................................................................... 12
Figure 9.
Double-Speed Transition Band (Detail) ....................................................................... 12
Figure 10. Double-Speed Passband Ripple .................................................................................. 12
Figure 11. Single-Speed Mode Stopband Rejection ..................................................................... 16
Figure 12. Single-Speed Mode Stopband Rejection ..................................................................... 16
Figure 13. Single-Speed Mode Transition Band (Detail) ............................................................... 16
Figure 14. Single-Speed Mode Passband Ripple ......................................................................... 16
Figure 15. Double-Speed Mode Stopband Rejection .................................................................... 16
Figure 16. Double-Speed Mode Stopband Rejection .................................................................... 16
Figure 17. Double-Speed Mode Transition Band (Detail) ............................................................. 17
Figure 18. Double-Speed Mode Passband Ripple ........................................................................ 17
Figure 19. Quad-Speed Mode Stopband Rejection ...................................................................... 17
Figure 20. Quad-Speed Mode Stopband Rejection ...................................................................... 17
Figure 21. Quad-Speed Mode Transition Band (Detail) ................................................................ 17
Figure 22. Quad-Speed Mode Passband Ripple ........................................................................... 17
Figure 23. DAC Serial Audio Port .................................................................................................. 21
Figure 24. Master Mode, Left Justified SAI ................................................................................... 24
Figure 25. Slave Mode, Left Justified SAI ..................................................................................... 24
Figure 26. Master Mode, I²S SAI ................................................................................................... 24
Figure 27. Slave Mode, I²S SAI ..................................................................................................... 24
Figure 28. Left Justified up to 24-Bit Data .....................................................................................25
Figure 29. I²S, up to 24-Bit Data .................................................................................................... 25
Figure 30. Right Justified Data ...................................................................................................... 25
Figure 31. Control Port Timing - I²C Mode .................................................................................... 26
Figure 32. Control Port Timing - SPI Mode ................................................................................... 27
Figure 33. Typical Connection Diagram ........................................................................................ 28



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