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NM1282KSLAXAL 数据表(PDF) 101 Page - Nanya Technology Corporation. |
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NM1282KSLAXAL 数据表(HTML) 101 Page - Nanya Technology Corporation. |
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101 / 120 page  Version 1.3 101 Nanya Technology Corp. 06/2018 All Rights Reserved. © 2Gb SLC NAND + 2Gb LPDDR2 NM1282KSLAXAL NTC Proprietary Level: Property Mode Register Assignment MR# MA <7:0> Function Access OP7 OP6 OP5 OP4 OP3 OP2 OP1 OP0 0 00H Device Info R (RFU) RZQI (RFU) DI DAI 1 01H Device Feature1 W nWR (for AP) WC BT BL 2 02H Device Feature2 W (RFU) RL & WL 3 03H I/O Config-1 W (RFU) DS 4 04H Refresh Rate R TUF (RFU) Refresh Rate 5 05H Basic Config-1 R Manufacturer ID 6 06H Basic Config-2 R Revision ID1 7 07H Basic Config-3 R Revision ID2 8 08H Basic Config-4 R I/O width Density Type 9 09H Test Mode W Specific Test Mode 10 0AH IO Calibration W Calibration Code 11~15 0BH~0FH (Reserved) (RFU) 16 10H PASR_BANK W Bank Mask (4-Bank or 8-Bank) 17 11H PASR_Seg W Segment Mask 18-19 12H-13H (Reserved) (RFU) 20-31 18H-1FH Reserved for NVM 32 20H DQ calibration pattern A R See “Data Calibration Pattern Description” 33-39 21H-27H (Do Not Use) 40 28H DQ calibration pattern B R See “Data Calibration Pattern Description” 41-47 29H-2FH (Do Not Use) (DNU) 48-62 30H-3EH (Reserved) (RFU) 63 3FH Reset W X 64-126 40H-7EH (Reserved) (RFU) 127 7FH (Do Not Use) (DNU) 128-190 80H-BEH (Reserved) (RFU) 191 BFH (Do Not Use) (DNU) 192-254 C0H-FEH (Reserved) (RFU) 255 FFH (Do Not Use) (DNU) Notes: 1. RFU bits shall be set to “0” during Mode Register writes. RFU bits shall be read as “0” during Mode Register reads. All Mode Registers that are specified as RFU shall not be written. Writes to read-only registers shall have no impact on the functionality of the device. 2. All Mode Registers from that are specified as RFU or write-only shall return undefined data when read and DQS shall be toggled. |
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