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STSPIN32F0ATR 数据表(PDF) 22 Page - STMicroelectronics |
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STSPIN32F0ATR 数据表(HTML) 22 Page - STMicroelectronics |
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22 / 41 page ![]() Device description STSPIN32F0A 22/41 DocID030766 Rev 2.0 6.1.1 UVLO on supply voltages The STSPIN32F0A device provides UVLO protections on all power supplies. The device enters into the undervoltage condition when the power supply voltage falls below the off threshold voltage and expires when the motor supply voltage goes over the on threshold voltage. Table 9: "UVLO and OT protection management" shows the UVLO protection management: which blocks are switched off after an UVLO event. Figure 6: Power-up and power-down sequence 6.1.2 Thermal protection The device embeds an overtemperature shut-down protection. The thermal sensors are placed next to the DC/DC and linear regulator blocks. When the OT protection is triggered the correspondent block is switched off, the thermal shut-down condition only expires when the temperature goes below the “TSD - Thys” temperature (auto-restart). Table 9: "UVLO and OT protection management" shows the thermal protection management which blocks are switched off after an overtemperature event. 6.2 DC/DC buck regulator The internal DC/DC buck converter provides the 3.3 V supply voltage suitable to supply the MCU and other external devices. The regulator operates in the discontinuous current mode (DCM). A soft-start function with fixed start-up time is implemented to minimize the inrush current at the start-up, refer to Figure 8: "Soft-start timing". An overcurrent and short-circuit protection is provided. If the failure event occurs on the SW pin and the IOVC threshold is reached the regulator is latched off. To restart the DC/DC regulator a power-down and power-up cycle of device supply voltage (VM) is mandatory. VM VDD VREG VMOn VDDOn PWR_OK tss 13 V typ. PWR_OK The DC/DC Reg stops to work The actualVDD voltage falls to 0V discharging the output capacitan ce The Lin Reg stops to work The actualVREG voltage falls to 0V discharging the output capacitan ce |
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