STSPIN32F0ATR datasheet(23/41 Pages) STMICROELECTRONICS

23 / 41 page

STSPIN32F0A

Device description

DocID030766 Rev 2.0

23/41

If the failure event occurs on the regulator output (VDDA pin) and the voltage goes below

the UVLO threshold (VDDOff), the regulator restarts with a new soft-start sequence until the

OC condition is removed. In this case the current in the coil is limited by ISW.peak.

The DC/DC regulator embeds a thermal protection as described in Section 6.1.2: "Thermal

protection".

Figure 7: DC/DC buck regulator topology

Figure 8: Soft-start timing

6.2.1

External optional 3.3 V supply voltage

It is possible provide externally the 3.3 V supply voltage directly on the VDDA pin. In this

case, there are two possible configurations:

The SW pin floating or shorted to VM: in this case the internal power switch of the

DC/DC converter continues to switch on/off according to the internal clock

The SW pin shorted to GND or VDD: in this case the internal power switch detects a

short-circuit and it is latched off.

Co ntrol

DC/DC buck conv.

3.3 V

VDDA

To MCU

C VDDA

LSW

AM039986

t [ms]

tSS

VDDA [V]

4.5

3.3

STSPIN32F0ATR 数据表(PDF) 23 Page - STMicroelectronics