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PCF8564A 数据表(PDF) 15 Page - NXP Semiconductors |
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PCF8564A 数据表(HTML) 15 Page - NXP Semiconductors |
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15 / 65 page ![]() PCF85063A All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved. Product data sheet Rev. 7 — 30 March 2018 15 of 65 NXP Semiconductors PCF85063A Tiny Real-Time Clock/calendar with alarm function and I2C-bus 8.2.2.2 MI and HMI: minute and half minute interrupt The minute interrupt (bit MI) and half minute interrupt (bit HMI) are pre-defined timers for generating interrupt pulses on pin INT; see Figure 10. The timers are running in sync with the seconds counter (see Table 19 on page 21). The minute and half minute interrupts must only be used when the frequency offset is set to normal mode (MODE = 0), see Section 8.2.3. In normal mode, the interrupt pulses on pin INT are 1⁄64 s wide. When starting MI, the first interrupt will be generated after 1 second to 59 seconds. When starting HMI, the first interrupt will be generated after 1 second to 29 seconds. Subsequent periods do not have such a delay. The timers can be enabled independently from one another. However, a minute interrupt enabled on top of a half minute interrupt is not distinguishable. The duration of the timer is affected by the register Offset (see Section 8.2.3). Only when OFFSET[6:0] has the value 00h the periods are consistent. 8.2.2.3 TF: timer flag The timer flag (bit TF) is set logic 1 on the first trigger of MI, HMI, or the countdown timer. The purpose of the flag is to allow the controlling system to interrogate what caused the interrupt: timer or alarm. The flag can be read and cleared by command. The status of the timer flag TF can affect the INT pulse generation depending on the setting of TI_TP (see Section 8.6.2 “Register Timer_mode” on page 30): • When TI_TP is set logic 1 – an INT pulse is generated independent of the status of the timer flag TF – TF stays set until it is cleared – TF does not affect INT In this example, the TF flag is not cleared after an interrupt. Fig 10. INT example for MI Table 10. Effect of bits MI and HMI on INT generation Minute interrupt (bit MI) Half minute interrupt (bit HMI) Result 0 0 no interrupt generated 1 0 an interrupt every minute 0 1 an interrupt every 30 s 1 1 an interrupt every 30 s |
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