PCF8564A datasheet(63/65 Pages) NXP

63 / 65 page

PCF85063A

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Product data sheet

Rev. 7 — 30 March 2018

63 of 65

NXP Semiconductors

PCF85063A

Tiny Real-Time Clock/calendar with alarm function and I2C-bus

26. Tables

Table 1.

Ordering information . . . . . . . . . . . . . . . . . . . . .2

Table 2.

Ordering options . . . . . . . . . . . . . . . . . . . . . . . . .2

Table 3.

Marking codes . . . . . . . . . . . . . . . . . . . . . . . . . .2

Table 4.

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .5

Table 5.

Registers overview . . . . . . . . . . . . . . . . . . . . . .7

Table 6.

Control_1 - control and status register 1

(address 00h) bit description . . . . . . . . . . . . . . .8

Table 7.

First increment of time circuits after STOP bit

release . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 8.

Registers reset values . . . . . . . . . . . . . . . . . . .12

Table 9.

Control_2 - control and status register 2

(address 01h) bit description . . . . . . . . . . . . . .13

Table 10. Effect of bits MI and HMI on INT generation . .15

Table 11. CLKOUT frequency selection . . . . . . . . . . . . .16

Table 12. Offset - offset register (address 02h) bit

description . . . . . . . . . . . . . . . . . . . . . . . . . . . .17

Table 13. Offset values . . . . . . . . . . . . . . . . . . . . . . . . . .17

Table 14. Correction pulses for MODE = 0 . . . . . . . . . . .18

Table 15. Effect of correction pulses on frequencies for

MODE = 0. . . . . . . . . . . . . . . . . . . . . . . . . . . . .18

Table 16. Correction pulses for MODE = 1 . . . . . . . . . . .19

Table 17. Effect of correction pulses on frequencies for

MODE = 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

Table 18. RAM_byte - 8-bit RAM register (address 03h)

bit description . . . . . . . . . . . . . . . . . . . . . . . . . .21

Table 19. Seconds - seconds register (address 04h) bit

description . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

Table 20. Seconds coded in BCD format . . . . . . . . . . . .22

Table 21. Minutes - minutes register (address 05h) bit

description . . . . . . . . . . . . . . . . . . . . . . . . . . . .23

Table 22. Hours - hours register (address 06h) bit

description . . . . . . . . . . . . . . . . . . . . . . . . . . . .23

Table 23. Days - days register (address 07h) bit

description . . . . . . . . . . . . . . . . . . . . . . . . . . . .23

Table 24. Weekdays - weekdays register (address 08h)

bit description . . . . . . . . . . . . . . . . . . . . . . . . .23

Table 25. Weekday assignments . . . . . . . . . . . . . . . . . . .24

Table 26. Months - months register (address 09h) bit

description . . . . . . . . . . . . . . . . . . . . . . . . . . . .24

Table 27. Month assignments in BCD format . . . . . . . . . .24

Table 28. Years - years register (0Ah) bit description. . . .25

Table 29. Second_alarm - second alarm register

(address 0Bh) bit description . . . . . . . . . . . . . .26

Table 30. Minute_alarm - minute alarm register

(address 0Ch) bit description . . . . . . . . . . . . . .27

Table 31. Hour_alarm - hour alarm register

(address 0Dh) bit description . . . . . . . . . . . . . .27

Table 32. Day_alarm - day alarm register (address 0Eh)

bit description . . . . . . . . . . . . . . . . . . . . . . . . . .27

Table 33. Weekday_alarm - weekday alarm register

(address 0Fh) bit description . . . . . . . . . . . . . .28

Table 34. Timer_value - timer value register

(address 10h) bit description . . . . . . . . . . . . . .29

Table 35. Timer_mode - timer control register

(address 11h) bit description . . . . . . . . . . . . . .30

Table 36. Timer clock frequency and timer durations. . . .30

Table 37. First period delay for timer counter value T . . 31

Table 38. INT operation . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Table 39. I2C slave address byte . . . . . . . . . . . . . . . . . . . 35

Table 40. Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 38

Table 41. Static characteristics . . . . . . . . . . . . . . . . . . . . 39

Table 42. I2C-bus characteristics . . . . . . . . . . . . . . . . . . . 44

Table 43. SnPb eutectic process (from J-STD-020D) . . . 52

Table 44. Lead-free process (from J-STD-020D) . . . . . . 52

Table 45. Selection of Real-Time Clocks . . . . . . . . . . . . 56

Table 46. Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 58

Table 47. Revision history . . . . . . . . . . . . . . . . . . . . . . . . 60

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