Data

lines

Power

supply

Ohmic

interconnect

VBUS

GND

Data

lines

Source

Cable

Source bulk capacitance

VBUS

GND

where C1 and C2 can be either a single capacitor, a capacitor bank or a distributed capacitance having a

minimum value (total) of 10 uF.

7.6

Clock dithering

To reduce EMI emission, the clock frequency dithers by 5% around its nominal value thus reducing the noise

mean amplitude. This also randomly spreads the switching currents of many different STPD01 in a multi-port

system.

7.7

Programmable watchdog

The STPD01 includes a watchdog function. The watchdog timer is enabled in the register 0x06. During this time,

if there is no communication between the host and the STPD01, an interrupt is generated in the INT pin if not

STPD01 address, otherwise the registers 0x00, 0x01 and 0x05 are reset at their default values.

This watchdog function can be disabled setting the bit 1 in register 0x06.

7.8

Protections

The device is equipped with some protections summarized in the following table

Protection

Function

INT pin

STATUS

Pon pin

STATUS

OVP (overvoltage

protection)

Active as soon as the device is enabled and PVIN/VCC voltage valid is

present (above the UVLO level), even during the soft-start. The protection

is triggered when the voltage sensed on the VSNS pin rises over the OVP

threshold. See Section 7.8.1 Overvoltage protection for more details.

LOW

Pon goes low if

Vout rises

above 5% of

the value set

(deglitched for

5 ms). Also, in

case EN pin is

low, the Pon is

low

CC (constant

current function)

Active as soon as the device is in regulation (so, at the ends of the soft-

threshold and the device acts to overcome the voltage regulation loop to

limit the output current. The VOUT drops below the programmed level.

LOW

HIGH

OTP

(overtemperature

protection)

Active as soon as the device is enabled and PVIN/VCC voltage valid is

present (above the UVLO level), even during the soft- start. The protection

is triggered when the internal temperature is over the OTP threshold and

the device acts by suddenly switching off both HS and LS MOSFET. The

activated if enabled by the dedicated bit.

LOW

HIGH

STPD01

Clock dithering

DS13473 - Rev 1

page 20/43