STPD01 datasheet(25/43 Pages) STMICROELECTRONICS

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Control register description

8.1

Table 10. Configuration bits

Content

# of configurations

Comments

Vout

240 (8 bit)

3 V to 5.9 V with 20 mV step, 5.9 V to 11 V with 100 mV step, 11 V to 20 V with

200 mV step

Ilim

25 (5 bit)

From 0.1 A to 3 A with 100 mA steps (flag_50 mA can be used to obtain 50 mA

steps)

Interrupt mask

7 (7 bit)

OVP, CC, SCP, Pon, WD, OTP, OTW, IPK

Interrupt status

7 (7 bit)

Interrupt status

Interrupt latch

7 (7 bit)

Interrupt latch

Auto-discharge

2 (1 bit)

Auto-discharge enable/disable

Dithering

2 (1 bit)

Dithering enable/disable

Switching frequency

2 (1 bit)

At least 500 kHz and 750 kHz

Cable drop comp.

3 (2 bit)

OFF, full

Enable watchdog

2 (1 bit)

Enable/disable

Watchdog

4 (2 bit)

100 ms, 500 ms, 1 s, 5 s

Enable

2 (1 bit)

ON/OFF (see Section 7 Operation description)

Table 11. Register map summary

ADDR R/W

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

0x00

R/W

Vout(7)

Vout(6)

Vout(5)

Vout(4)

Vout(3)

Vout(2)

Vout(1)

Vout(0)

0x01

R/W

Flag_50ma

Not used

ILIM(4)

ILIM(3)

ILIM(2)

ILIM(1)

ILIM(0)

0x02

INT_STAT(7)

INT_STAT(6)

INT_STAT(5)

INT_STAT(4)

INT_STAT(3)

INT_STAT(2)

INT_STAT(1)

INT_STAT(0)

0x03

R/C

INT_LTC(7)

INT_LTC(6)

INT_LTC(5)

INT_LTC(4)

INT_LTC(3)

INT_LTC(2)

INT_LTC(1)

INT_LTC(0)

0x04

R/W INT_MASK(7) INT_MASK(6) INT_MASK(5) INT_MASK(4) INT_MASK(3) INT_MASK(2) INT_MASK(1) INT_MASK(0)

0x05

R/W

WTCHDG(1)

WTCHDG(0)

Not used

CDC(1)

CDC(0)

SW_FREQ

DITH

AUTO_DIS

0x06

R/W

Not used

WD_EN

DIG_EN

R: read; R/W: read and write; R/C: cleared when read.

STPD01

Control register description

DS13473 - Rev 1

page 25/43

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