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STPD01 数据表(PDF) 30 Page - STMicroelectronics |
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STPD01 数据表(HTML) 30 Page - STMicroelectronics |
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30 / 43 page ![]() 9 Application notes 9.1 Board layout guidelines Guidelines The DC-DC converter area is very sensitive, and it is necessary to pay attention to the layout of this part. The DC- DC converter generates GND noise that can get coupled on surrounding ground reducing the sensitivity, and high-frequency components can be coupled onto RF part. So, to ensure a correct layout it is necessary to: • Provide efficient filtering by placing capacitors as close as possible • Reduce parasitic ensuring wide and short connections. Four-layer boards A four-layer board is strongly recommended. Put the ground layer very close to the top layer to obtain a good ground plane reference. A thickness between the top layer and ground layer of 0.2 mm or 0.3 mm is suggested. Put a ground plane internally to reduce the coupling between the traces If it is not possible to use a four-layer board, it is necessary to fill the area under the phase node of the board with ground metal to reduce or eliminate radiation emissions. Board routing and wiring should not be placed in this region to prevent coupling effects and to ensure a good ground reference plane to the RF parts. Ground plane Any switch mode power supply requires a good PCB layout in order to achieve the maximum performance. Component placement, and GND trace routing and width are the major issues. Basic rules commonly used for DC-DC converters for good PCB layout should be followed. All traces carrying current should be drawn on the PCB as short and as thick as possible. This should be done to minimize resistive and inductive parasitic effects, and increase system efficiency. Suggested PCB (ring) ground plane to avoid spikes on the output voltage. Good soldering of the exposed pad helps on this issue. Connect all the ground metallization and/or layers with as many vias as possible. Ground vias between layers should be added liberally throughout the RF portion of the PCB. This helps prevent accrual of parasitic ground inductance due to ground-current return paths. The vias also help to prevent cross-coupling from RF and other signal lines across the PCB. The layers assigned to system bias (DC supply) and ground must be considered in terms of the return current for the components. The general guidance is not to have signals routed on layers between the bias layer and the ground layer. Capacitors placing Particular care has to be taken in the placement of the supply voltage filtering capacitors. It is, in fact, important to ensure efficient filtering placing these capacitors as close as possible from their dedicated pins on the VIN (C6), VCC (C5), VREG (C1), VHDRIVE (C3), VBOOT (C14) and VSNS (C16). STPD01 Application notes DS13473 - Rev 1 page 30/43 |
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