List of figures

Figure 1.

STPD01 typical application schematic .................................................... 2

Figure 2.

Pin configuration (top through view)...................................................... 3

Figure 3.

STPD01 block diagram .............................................................. 8

Figure 4.

Efficiency (Vin = Vcc = 24 V, CC = 0x1F, Fsw = 500kHz) ....................................... 9

Figure 5.

PLOSS (Vin = Vcc = 24 V, CC = 0x1F, Fsw = 500 kHz) ......................................... 9

Figure 6.

Efficiency (Vin = Vcc = 24 V, CC = 0x1F, Fsw = 750 kHz) ....................................... 9

Figure 7.

PLOSS (Vin = Vcc = 24 V, CC = 0x1F, Fsw = 750 kHz) ........................................ 10

Figure 8.

VOUT vs. load (Vin = VCC = 24 V, Vout = 0x64 (5 V), CC = 0x1F)................................ 10

Figure 9.

VOUT vs. load (Vin = VCC = 24 V, Vout = 0xB0 (9 V), CC = 0x1F) ............................... 10

Figure 10.

VOUT vs. load (Vin = VCC = 24 V, Vout = 0xD8 (15 V), CC = 0x1F) .............................. 11

Figure 11.

VOUT vs. load (Vin = VCC = 24 V, Vout = 0xF1 (20 V), CC = 0x1F)............................... 11

Figure 12.

VOUT vs. load, with cable drop compensation on (Vin = VCC = 24 V, Vout = 0x64 (5 V), CC = 0x1F, Rcdc2 = 24

kΩ, Fsw = 500 kHz) ................................................................ 11

Figure 13.

VCDC vs. load (Vin = VCC = 24 V, Vout = 0x64 (5 V), CC = 0x1F, Rcdc2 = 24 kΩ, Fsw = 500 kHz) .......... 12

Figure 14.

VOUT vs. load, with cable drop compensation on (Vin = VCC = 24 V, Vout = 0x64 (5 V), CC = 0x1F, Rcdc2 = 6.8

kΩ, Fsw = 500 kHz) ................................................................ 12

Figure 15.

VCDC vs. load (Vin = VCC = 24 V, Vout = 0x64 (5 V), CC = 0x1F, Rcdc2 = 6.8 kΩ, Fsw = 500 kHz).......... 12

Figure 16.

VOUT vs. load, with cable drop compensation on (Vin = VCC = 24 V, Vout = 0xF1 (20 V), CC = 0x1F, Rcdc2 = 24

kΩ, Fsw = 500 kHz) ................................................................ 13

Figure 17.

VCDC vs. load (Vin = VCC = 24 V, Vout = 0xF1 (20 V), CC = 0x1F, Rcdc2 = 24 kΩ, Fsw = 500 kHz) ......... 13

Figure 18.

VOUT vs. load, with cable drop compensation on (Vin = VCC = 24 V, Vout = 0xF1 (20 V), CC = 0x1F, Rcdc2 = 6.8

kΩ, Fsw = 500 kHz) ................................................................ 13

Figure 19.

VCDC vs. load (Vin = VCC = 24 V, Vout = 0xF1 (20 V), CC = 0x1F, Rcdc2 = 6.8 kΩ, Fsw = 500 kHz)......... 14

Figure 20.

VOUT transition (Vin = VCC = 24 V, Vout = 0x64 (5 V) to 0xB0 (9 V), CC = 0x1F, load = 500 mA, Fsw = 500 kHz)

.............................................................................. 14

Figure 21.

VOUT transition (Vin = VCC = 24 V, Vout = 0xB0 (9 V) to 0x64 (5 V), CC = 0x1F, load = 500 mA, Fsw = 500 kHz)

.............................................................................. 14

Figure 22.

VOUT transition (Vin = VCC = 24 V, Vout = 0x64 (5 V ) to 0xD8 (15 V), CC = 0x1F, load = 500 mA, Fsw = 500 kHz)

.............................................................................. 14

Figure 23.

VOUT transition (Vin = VCC = 24 V, Vout = 0xD8 (15 V ) to 0x64 (5 V), CC = 0x1F, load = 500 mA, Fsw = 500 kHz)

.............................................................................. 14

Figure 24.

VOUT transition (Vin = VCC = 24 V, Vout = 0x64 (5 V ) to 0xF1 (20 V), CC = 0x1F, load = 500 mA, Fsw = 500 kHz)

.............................................................................. 15

Figure 25.

VOUT transition (Vin = VCC = 24 V, Vout = 0xF1 (20 V ) to 0x64 (5 V), CC = 0x1F, load = 500 mA, Fsw = 500 kHz)

.............................................................................. 15

Figure 26.

VOUT transition (Vin = VCC = 24 V, Vout = 0x00 (3 V ) to 0x64 (5 V) to 0xF1 (20 V), CC = 0x1F, load = 500 mA,

Fsw = 500 kHz) ................................................................... 15

Figure 27.

VOUT transition (Vin = VCC = 24 V, Vout = 0xF1 (20 V ) to 0x64 (5 V) to 0x00 (3 V), CC = 0x1F, load = 500 mA,

Fsw = 500 kHz) ................................................................... 15

Figure 28.

Enable startup (Vin = VCC = 24 V, Vout = 0x64 (5 V), no load) .................................. 15

Figure 29.

Enable shutdown (Vin = VCC = 24 V, Vout = 0x64 (5 V), no load) ................................ 15

Figure 30.

Digit enable startup (Vin = VCC = 24 V, Vout = 0x64 (5 V), no load) ............................... 16

Figure 31.

Digit enable shutdown (Vin = VCC = 24 V, Vout = 0x64 (5 V), no load) ............................. 16

Figure 32.

Cable drop configuration ............................................................ 18

Figure 33.

Deglitch time .................................................................... 19

Figure 34.

Transition envelope for positive voltage transitions .......................................... 19

Figure 35.

Transition envelope for negative voltage transitions .......................................... 19

Figure 36.

Placement of source bulk capacitance ................................................... 20

Figure 37.

Data transfer validity ............................................................... 22

Figure 38.

START and STOP commands ........................................................ 22

Figure 39.

Write command .................................................................. 23

STPD01

List of figures

DS13473 - Rev 1

page 41/43