STPD01 datasheet(21/43 Pages) STMICROELECTRONICS

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Protection

Function

INT pin

STATUS

Pon pin

STATUS

The device follows a soft-start procedure when the temperature is below

135 °C with default output voltage value.

SCP (short-circuit

protection)

Active as soon as the device is in regulation (at the ends of the soft-start).

The protection is triggered when the output voltage is under the SCP

threshold and the Ipk threshold is detected. The device acts by suddenly

switching off both HS and LS MOSFET.

The device follows a soft-start procedure after 300 ms with default output

voltage value. The VOUT bits (reg 0x00) and Ilim bits (reg 0x01) are reset.

LOW

HIGH

IPK (inductor peak

current)

Active as soon as the device is enabled and PVIN/VCC voltage valid is

present (above the UVLO level), even during the soft-start.

The condition is checked cycle-bye-ycle on the high-side and triggered

once the current cross the IPK threshold.

The device reacts switching asynchronously (independent from oscillator

frequency) between Ipk and Ivalley with a given slope, dependent on L and

Cout.

LOW

HIGH

7.8.1

Overvoltage protection

Overvoltage protection behaves in different ways depending on the state of the device.

Case A) OV during Vout transition

•

In case an OV occurs during a Vout transition, the output voltage must be reset to 5 V (Vsafe). Therefore, the

following process applies:

OV event longer than deglitch time => REG 0x00 = 0x64 => after blanking time, the half-bridge is put in high

impedance if the OV condition is still present.

In case OV lasts less than deglitch time, the event is filtered.

Case B) OV during steady-state

•

Case B1) Vout=5 V

If OV event is detected, the half-bridge is just put in high impedance until the condition disappears.

•

Case B2) Vout different than 5 V

The following process applies:

OV event longer than deglitch time => REG 0x00 = 0x64 => after blanking time, the half-bridge is put in high

impedance if the OV condition is still present.

In case OV lasts less than deglitch time, the event is filtered.

7.9

Interrupt functionality

The interrupt output is activated on the edge of the fault and is reset once the fault disappears. To keep track of

the fault, the corresponding bit in the INT_LTCH register is set.

Such interrupt management process allows multiple interrupt tracking. The I2C master reads the INT_LTCH

7.10

Switching frequency

The STPD01 allows two possible programmable switching frequencies (by I2C): 500 kHz (default) and 750 kHz

(reg 0x05 bit 2).

STPD01

Interrupt functionality

DS13473 - Rev 1

page 21/43

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