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MCP3564-E/ST 数据表(PDF) 6 Page - Microchip Technology

部件名 MCP3564-E/ST
功能描述  Two/Four/Eight-Channel, 153.6 ksps, Low-Noise 24-Bit Delta-Sigma ADCs
PDF  108 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

MCP3564-E/ST 数据表(HTML) 6 Page - Microchip Technology

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MCP3561/2/4
DS20006181C-page 6
 2019-2021 Microchip Technology Inc.
ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = 2.7V to 3.6V, DVDD = 1.8V to AVDD +0.1V,
MCLK = 4.9152 MHz, VREF =AVDD, ADC_MODE[1:0] = 11. All other register map bits to their default conditions,
TA = -40°C to +125°C, VIN = -0.5 dBFS at 50 Hz.
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Supply Requirements
Analog Operating Voltage
AVDD
2.7
3.6
V
Digital Operating Voltage
DVDD
1.8
AVDD +0.1
V
DVDD ≤ 3.6V
Analog Operating Current
AIDD
0.56
0.81
mA
BOOST[1:0] = 00, 0.5x
0.69
0.96
mA
BOOST[1:0] = 01, 0.66x
0.93
1.3
mA
BOOST[1:0] = 10, 1x
1.65
2.2
mA
BOOST[1:0] = 11, 2x
Digital Operating Current
DIDD
0.25
0.37
mA
Note 8
Analog Partial Shutdown
Current
AIDDS_PS
——
22
µA
Digital Partial Shutdown
Current
DIDDS_PS
158
µA
Analog Full Shutdown
Current
AIDDS_FS
0.83
µA
CONFIG0 = 0x00, TA = +105°C,
MCLK input in Idle mode
(Note 2)
Analog Full Shutdown
Current
AIDDS_FS
1.1
µA
CONFIG0 = 0x00, TA = +125°C,
MCLK input in Idle mode
Digital Full Shutdown
Current
DIDDS_FS
2.4
µA
CONFIG0 = 0x00, TA = +105°C,
MCLK input in Idle mode
(Note 2)
Digital Full Shutdown
Current
DIDDS_FS
5
µA
CONFIG0 = 0x00, TA = +125°C,
MCLK input in Idle mode
Power-on Reset (POR)
Threshold Voltage
VPOR_A
1.75
V
For analog circuits
VPOR_D
1.2
V
For digital circuits
POR Hysteresis
VPOR_HYS
150
mV
POR Reset Time
tPOR
—1
µs
Note 1:
This parameter is ensured by design and not 100% tested.
2:
This parameter is ensured by characterization and not 100% tested.
3:
REFIN- must be connected to ground for single-ended measurements.
4:
Full-Scale Range (FSR) = 2 x VREF/GAIN.
5:
This input impedance is due to the internal input sampling capacitor and frequency. This impedance is measured
between the two input pins of the channel selected with the input multiplexer.
6:
Applies to all analog gains. Offset and gain errors depend on analog gain settings. See Section 2.0 “Typical
Performance Curves”.
7:
INL is the difference between the endpoints line and the measured code at the center of the quantization band.
8:
DIDD is measured while no transfer is present on the SPI bus.



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