LP3971 datasheet(35/42 Pages) NSC

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LP3971 Controls (Continued)

GENERAL PURPOSE I/O FUNCTIONALITY (GPIO1 AND

GPIO2)

LP3971 has 2 general purpose I/Os for system control. I

compatible interface will be used for setting any of the pins to

input, output or hi-Z mode. Inputs value can be read via

serial interface (GPI1,2 bits). The pin 29 functionality needs

to be set to GPIO by serial interface register bit

nEXTCHGEN.

LP3971 GPIO Control Table

Controls

Port Function

Reg.

batmonchg

GPIO1<1>

GPIO1<0>

nextchgen_sel

bucen

GPIO1

gpin 1

Function

Input = 0

Enabled

Input = 1

Not Enabled

Enabled

HiZ

Input (dig)->

Input

Output = 0

Output= 1

GPIO2<1>

GPIO2<0>

Factory fm disabled

GPIO_tstiob

GPIO2

gpin2

HiZ

Input (dig)->

Input

Output = 0

Output = 1

The LP3971 Back Up Charger can be enabled/disabled by

two separate mechanisms. They are; 1) A dedicated control

input Pin 29, when configured for charger control.

Description of this operation is as follows:

•

In the default state, the BUCEN bit is not asserted, and

GPIO1 is configured as charger control. High level ap-

plied to GPIO1 will disable the back up charger, Low level

applied to GPIO1 will enable the back up charger. There

is an internal pull up that will disable the back up charger

if GPIO1 is “open”.

•

If BUCEN bit is asserted with GPIO1 configured for

charger control, the back up charger will always be en-

abled, and GPIO1 input will have no effect.

•

Configuration of GPIO1 charger function is via control

bit is asserted (Default state), GPIO1 is charger control.

When this bit is de-asserted, charger enable is deter-

mined only by the state of control register bit BUCEN.

•

One additional feature of the charger enable is when the

main battery voltage Vin (Pin 6) is less than the back up

battery voltage Vin BUBATT (Pin 15), The charger will

automatically disable regardless of the input received

from BUCEN or GPIO1.

REGULATED VOLTAGES OK

All the power domains have own register bit (x_OK) that

processor can read via serial interface to be sure that en-

abled powers are OK (regulating). Note that these read only

bits are only valid when regulators are settled (avoid reading

these bits during voltage change or power up).

LP3971 数据表(PDF) 35 Page - National Semiconductor (TI)

LP3971 数据表(HTML) 35 Page - National Semiconductor (TI)

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