LP3971 datasheet(37/42 Pages) NSC

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Application Note (Continued)

Typical Application Diagram with PXA27x Advanced Applications Processor Version “B”

20180721

LP3971 & PXA27x START-UP

Initial Cold Start Power On Sequence

The Back up battery is connected to the PMU, power is

applied to the back-up battery pin, the RTC_LDO turns

on and supplies a stable output voltage to the

VCC_BATT pin of the Applications processor (initiating

the power-on reset event) with nRSTO asserted from the

LP3971 to the processor.

The Applications processor waits for the de-assertion of

nBATT_FLT to indicate system power (V

IN) is available.

IF system power (V

bat) is avaliable, the LP3971 de-

asserts nBATT_FLT.

nRSTO de-asserts after a minimum of 50 mS.

The Applications processor asserts SYS_EN, the

LP3971 enables the system high-voltage power sup-

plies. The Applications processor starts its countdown

timer set to 125 mS.

The LP3971 enables the high-voltage power supplies.

-LDO1 power for VCC_MVT, BG, OSC13M and PLL

enabled first, followed by others if delay is on.

Countdown timer expires; the Applications processor

asserts PWR_EN (ext. pin or I

2C) to enable the low-

voltage power supplies. The processor starts the count-

down timer set to 125 mS period.

The Applications processor asserts PWR_EN (ext. pin or

2C), the LP3971 enables the low-voltage regulators.

Countdown timer expires; If enabled power domains are

OK (I

2C read) the power up sequence continues by

enabling the processors 13 MHz oscillator and PLL’s.

10. The Applications processor begins the execution of

code.

LP3971 数据表(PDF) 37 Page - National Semiconductor (TI)

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