LP3971 datasheet(41/42 Pages) NSC

41 / 42 page

Application Hints (Continued)

Because these two components are out of phase the rms

value can be used to get an approximate value of peak-to-

peak ripple.

Voltage peak-to-peak ripple, root mean squared can be ex-

pressed as follows

Note that the output voltage ripple is dependent on the

inductor current ripple and the equivalent series resistance

of the output capacitor (R

ESR).

The R

ESR is frequency dependent (as well as temperature

dependent); make sure the value used for calculations is at

the switching frequency of the part.

TABLE 2. Suggested Capacitor and their Suppliers

Model

Type

Vendor

Voltage

Case Size

Inch (mm)

10 µF

GRM21BR60J106K

Ceramic, X5R

Murata

6.3V

0805 (2012)

JMK212BJ106K

Ceramic, X5R

Taiyo-Yuden

6.3V

0805 (2012)

C2012X5R0J106K

Ceramic, X5R

TDK

6.3V

0805 (2012)

Board Layout Considerations

PC board layout is an important part of DC-DC converter

design. Poor board layout can disrupt the performance of a

DC-DC converter and surrounding circuitry by contributing to

EMI, ground bounce, and resistive voltage loss in the traces.

These can send erroneous signals to the DC-DC converter

IC, resulting in poor regulation or instability.

Good layout for the converters can be implemented by fol-

lowing a few simple design rules.

Place the converters, inductor and filter capacitors close

together and make the traces short. The traces between

these components carry relatively high switching cur-

rents and act as antennas. Following this rule reduces

radiated noise. Special care must be given to place the

input filter capacitor very close to the V

IN and GND pin.

Arrange the components so that the switching current

loops curl in the same direction. During the first half of

each cycle, current flows from the input filter capacitor

through the converter and inductor to the output filter

capacitor and back through ground, forming a current

loop. In the second half of each cycle, current is pulled

up from ground through the converter by the inductor to

the output filter capacitor and then back through ground

forming a second current loop. Routing these loops so

the current curls in the same direction prevents mag-

netic field reversal between the two half-cycles and re-

duces radiated noise.

Connect the ground pins of the converter and filter ca-

pacitors together using generous component-side cop-

per fill as a pseudo-ground plane. Then, connect this to

the ground-plane (if one is used) with several vias. This

reduces ground-plane noise by preventing the switching

currents from circulating through the ground plane. It

also reduces ground bounce at the converter by giving it

a low-impedance ground connection.

Use wide traces between the power components and for

power connections to the DC-DC converter circuit. This

reduces voltage errors caused by resistive losses across

the traces.

Route noise sensitive traces, such as the voltage feed-

back path, away from noisy traces between the power

components. The voltage feedback trace must remain

close to the converter circuit and should be direct but

should be routed opposite to noisy components. This

reduces EMI radiated onto the DC-DC converter’s own

voltage feedback trace. A good approach is to route the

feedback trace on another layer and to have a ground

plane between the top layer and layer on which the

feedback trace is routed. In the same manner for the

adjustable part it is desired to have the feedback divid-

ers on the bottom layer.

Place noise sensitive circuitry, such as radio RF blocks,

away from the DC-DC converter, CMOS digital blocks

and other noisy circuitry. Interference with noise-

sensitive circuitry in the system can be reduced through

distance.

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