I

Unless otherwise noted, V

boldface type apply over the entire junction temperature range for operation, −40˚C to +125˚C. (Notes 2, 6) and (Note 9)

Symbol

Parameter

Conditions

Min

Typ

Max

Units

V

IL

Low Level Input Voltage

(Note 14)

−0.5

0.3 V

RTC

V

V

IH

High Level Input Voltage

(Note 14)

0.7 V

RTC

V

RTC

V

OL

Low Level Output Voltage

(Note 14)

0

0.2 V

TRC

I

OL

Low Level Output Current

V

3.0

mA

F

CLK

Clock Frequency

(Note 14)

400

kHz

t

BF

Bus-Free Time Between Start and Stop

(Note 14)

1.3

µs

t

HOLD

Hold Time Repeated Start Condition

(Note 14)

0.6

µs

t

CLKLP

CLK Low Period

(Note 14)

1.3

µs

t

CLKHP

CLK High Period

(Note 14)

0.6

µs

t

SU

Set Up Time Repeated Start Condition

(Note 14)

0.6

µs

t

DATAHLD

Data Hold Time

(Note 14)

0

µs

t

CLKSU

Data Set Up Time

(Note 14)

100

ns

T

SU

Set Up Time for Start Condition

(Note 14)

0.6

µs

T

TRANS

Maximum Pulse Width of Spikes that

Must be Suppressed by the Input Filter

of Both DATA & CLK Signals

(Note 14)

50

ns

Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device

is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical

Characteristics tables.

Note 2: All voltages are with respect to the potential at the GND pin.

Note 3: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be

derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125˚C), the maximum power

dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (

following equation: TA-MAX = TJ-MAX-OP – (

Note 4: Junction-to-ambient thermal resistance (

standard JESD51–7. The test board is a 4-layer FR-4 board measuring 102 mm x 76 mm x 1.6 mm with a 2x1 array of thermal vias. The ground plane on the board

is 50 mm x 50 mm. Thickness of copper layers are 36 µm/1.8 µm/18 µm/36 µm (1.5 oz/1 oz/1 oz/1.5 oz). Ambient temperature in simulation is 22˚C, still air. Power

dissipation is 1W. Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation

exists, special care must be paid to thermal dissipation issues in board design. The value of

dissipation issues. For more information on these topics, please refer to Application Note 1187: Leadless Leadframe Package (LLP) and the Power Efficiency and

Power Dissipation section of this datasheet.

Note 5: The Human body model is a 100 pF capacitor discharged through a 1.5 k

Ω resistor into each pin. (MIL-STD-883 3015.7). The machine model is a 200 pF

capacitor discharged directly into each pin. (EAIJ)

Note 6: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are production

tested, guaranteed through statistical analysis or guaranteed by design. All limits at temperature extremes are guaranteed via correlation using standard Statistical

Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).

Note 7: Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value.

Ω to 20 kΩ range.

Note 10: LDO_RTC voltage can track LDO1 (I/O) Voltage. Refer to LP3971 Controls Section for more information.

input operating voltage.

Note 12: The input voltage range recommended for ideal applications performance for the specified output voltages is given below:

Note 14: This electrical specification is guaranteed by design.

Note 15: An increase in the load current results in a slight decrease in the output voltage and vice versa.

Note 16: Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value. This specification does not apply

for input voltages below 2.7V for LDOs 1–3 and 1.8V for LDOs 4 and 5.

www.national.com

11