AT25DF256 datasheet(2/43 Pages) DIALOG

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DS-25DF256–035D–2/2017

Features



Single 1.65V - 3.6V Supply

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Serial Peripheral Interface (SPI) Compatible

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Supports SPI Modes 0 and 3

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Supports Dual Output Read

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104MHz Maximum Operating Frequency

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Clock-to-Output (tV) of 6 ns

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Flexible, Optimized Erase Architecture for Code + Data Storage Applications

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Small (256-Byte) Page Erase

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Uniform 4-Kbyte Block Erase

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Uniform 32-Kbyte Block Erase

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Full Chip Erase

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Hardware Controlled Locking of Protected Sectors via WP Pin

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128-byte, One-Time Programmable (OTP) Security Register

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64 bytes factory programmed with a unique identifier

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64 bytes user programmable

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Flexible Programming

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Byte/Page Program (1 to 256 Bytes)

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Fast Program and Erase Times

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1.5ms Typical Page Program (256 Bytes) Time

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50ms Typical 4-Kbyte Block Erase Time

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350ms Typical 32-Kbyte Block Erase Time

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Automatic Checking and Reporting of Erase/Program Failures

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Software Controlled Reset

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JEDEC Standard Manufacturer and Device ID Read Methodology

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Low Power Dissipation

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200nA Ultra Deep Power Down current (Typical)

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5µA Deep Power-Down Current (Typical)

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25uA Standby current (Typical)

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4.5mA Active Read Current (Typical)

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Endurance: 100,000 Program/Erase Cycles

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Data Retention: 20 Years

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Temperature Range:-10°C to +85°C (1.65V to 3.6V), -40°C to +85° (1.7V to 3.6V)

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Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options

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8-lead SOIC (150-mil)

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8-pad Ultra Thin DFN (2 x 3 x 0.6 mm)

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8-lead TSSOP Package

AT25DF256

256-Kbit, 1.65V Minimum

SPI Serial Flash Memory with Dual-Read Support

AT25DF256 数据表(PDF) 2 Page - Dialog Semiconductor

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