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ASL5015FHN 数据表(PDF) 28 Page - NXP Semiconductors |
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ASL5015FHN 数据表(HTML) 28 Page - NXP Semiconductors |
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28 / 69 page  NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) ASL5xxxyHz All information provided in this document is subject to legal disclaimers. © NXP B.V. 2019. All rights reserved. Product data sheet Rev. 2.1 — 5 February 2019 28 / 69 Table 21. OC threshold selection and CPFSx selection in MTP Register Bit Symbol Description 58h 4 OC1 OC threshold selection for Block 1 59h 4 OC2 OC threshold selection for Block 2 5Ah 4 OC3 OC threshold selection for Block 3 5Bh 4 OC4 OC threshold selection for Block 4 5Ch 15 CPFS0 Select Block 1 as top block 5Dh 15 CPFS1 Select Block 2 as top block 5Eh 15 CPFS2 Select Block 3 as top block 5Fh 15 CPFS3 Select Block 4 as top block If the OC bit is set to 0, the open circuit threshold is 6 V ±1 V, if it is 1, then the threshold is 17 V ±1.5 V. In case of OC = 0 and a failure in the charge pump, the MLC opens the first two switches of the Blocks with a 1 in the linked CPFSx bit. When OC = 1, the MLC opens only the top switch of the selected blocks. With this practice, if the MLC is in normal operation mode, it is able to continue driving the rest of switches with the programmed PWM. In case the MLC is in LHM, the fail-safe operation reaction is the same and it continues respecting the LHM configuration programmed in the MTP for the rest of the switches. Note: CPFS3 is linked to Block 4 of switches; these are the top switches if all blocks are in series. This bit should be the only one set to 1, of CPFSx bits, when all blocks are in serial configuration. 8.10 Matrix LED controller interface and configuration The ASL5xxxyHz family incorporates a CAN controller for communication with the microcontroller. CAN-FD versions (ASL5xxxFHz) are also available in the ASL5xxxyHz family. If these versions are required, please contact NXP Semiconductors. This serial interface is used to write into internal registers and read the data from the diagnostics register. The interface is also used to monitor any fault flags. The microcontroller has full control via the bus interface. No external clock is required for the oversampling, due to the on-chip 200 MHz oscillator. More information regarding On-Board and Off-Board configuration can be found in the application notes. There are two physical options: • When the microcontroller is located close to the MLC and on the same PCB, there can be a direct connection using the TX and RX lines. No physical layer is needed. • When the microcontroller is on a separate board or otherwise far away (> 10 cm) from the MLC, two CAN physical layer transceivers are needed. The physical layer will guarantee a robust and reliable communication over a long distance. In both configurations, the clock signal, generated by the internal oscillator, is divided by an adaptive prescaler to calibrate the clock to the incoming data. This process is to ensure a common communication speed. |
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