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ASL5015FHN 数据表(PDF) 41 Page - NXP Semiconductors |
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ASL5015FHN 数据表(HTML) 41 Page - NXP Semiconductors |
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41 / 69 page  NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) ASL5xxxyHz All information provided in this document is subject to legal disclaimers. © NXP B.V. 2019. All rights reserved. Product data sheet Rev. 2.1 — 5 February 2019 41 / 69 Address Register D7 D6 D5 D4 D3 D2 D1 D0 Reset Values F DIRECT_CH8_UB unused PWM[11:8] 00000000 10 DIRECT_CH9_LB PWM[7:0] 00000000 11 DIRECT_CH9_UB unused PWM[11:8] 00000000 12 DIRECT_CH10_LB PWM[7:0] 00000000 13 DIRECT_CH10_UB unused PWM[11:8] 00000000 14 DIRECT_CH11_LB PWM[7:0] 00000000 15 DIRECT_CH11_UB unused PWM[11:8] 00000000 16 DIRECT_CH12_LB PWM[7:0] 00000000 17 DIRECT_CH12_UB unused PWM[11:8] 00000000 18 to 2F reserved unused 00000000 30 IMMOFF 1 IMMOFF8 IMMOFF7 IMMOFF6 IMMOFF5 IMMOFF4 IMMOFF3 IMMOFF2 IMMOFF1 00000000 31 IMMOFF 2 unused IMMO FF12 IMMO FF11 IMMO FF10 IMMOFF9 00000000 32 START 1 CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1 00000000 33 START 2 unused CH12 CH11 CH10 CH9 00000000 34 CLEAR POR Illegal_ command MTP_ Locked REG_ ILLEGAL_ ACCESS MTP_ ILLEGAL_ ACCESS MTP_ ACCESS_ STATUS CLR_OC CLR_SC 00000000 35 READ_OC1 OC8 OC7 OC6 OC5 OC4 OC3 OC2 OC1 00000000 36 READ_OC2 unused OC12 OC11 OC10 OC9 00000000 37 READ_SC1 SC8 SC7 SC6 SC5 SC4 SC3 SC2 SC1 00000000 38 READ_SC2 unused SC12 SC11 SC10 SC9 00000000 39 NTC CPFAIL NTC[6:1] NTCFAIL 00000000 3A ID OTW_1 OTW_2 POK LHM_ STATUS ID[3:1] ID-FAIL 00000000 3B Internal_Status TXD_ Buffer_ Full unused 00000000 3C LHM BYPASS_ BINNING LHM_EXIT[6:4] LHM_TIMEOUT[3:1] MTP_ CFG 00000000 3D MTP Write Control1 unused MTP Register Adress [6:0] 00000000 3E MTP Write D1 MTP Write Data D1 [7:0] 00000000 3F MTP Write D2 MTP Write Data D2 [7:0] 00000000 40 MTP Read D1 MTP Read Data D1 [7:0] 00000000 41 MTP Read D2 MTP Read Data D2 [7:0] 00000000 All cells presented in the register map are configurable by the customer. If the microcontroller tries to write in the reserved registers, from 18h to 2Fh, the Matrix LED controller (MLC) will raises an error flag. This means that bit 4 of register 34h, REG_ILLEGAL_ACCESS, is set to 1. This bit can be cleared by writing a 1 on it. 12 Sleep and Wake Up The MLC can enter in Sleep mode and drastically reduce the current consumption, giving the possibility to make an energy efficient system. |
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