NXP Semiconductors

ASL5xxxyHz

Matrix LED Controller (MLC)

ASL5xxxyHz

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Product data sheet

Rev. 2.1 — 5 February 2019

46 / 69

MTP Registers (16 bits registers)[1][2]

No.

Bits Block

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

Add

ress

1568

98

62h

1584

99

63h

1600

100

64h

1616

101

65h

1632

102

66h

~

~

2016

126

7Eh

2032

127

Free space (480-bits). User definable. User can write any information in this space.

7Fh

[1]

All cells are read/write unless specified otherwise

[2]

All the values stored in the MTP start from the Most Significant bit (MSb) to the Less Significant Bit (LSb).

[3]

These cells are used for internal MLC configuration. If the microcontroller tries to read or write in these cells, an error flag is raised (bits 2 and 3 of register

34h).

[4]

Read only. If the microcontroller writes a value in this cell, the system does not raise an error flag, but also does not write any value in the cell.

[5]

Any value has no impact in the MLC configuration. Write a 0 when a write message is sent.

The internal curves' coefficients have 13 bits each, because they are signed coefficients.

If the user wants to program a negative coefficient, the first bit must be a logical 1.

Negative coefficients are fully allowed and help to have all possible curves' shapes with a

3rd grade polynomial equation.

Note: Registers from 0x38h to 0x57h (curves coefficients) will not have any effect in the

Direct PWM

14.1.1 Registers value selection criteria

Table 36. PWM frequency selection

Register

Bit D0

Frequency

0

244 Hz (default)

60h

1

488 Hz

Table 37. Slew rate selection

Register

Bit D3

Bit D2

Bit D1

Bit D0

[V/µs]

0

0

0

0

0,2

0

0

0

1

0,4

0

0

1

0

0,6

0

0

1

1

0,9

0

1

0

0

1,1

0

1

0

1

1,3

0

1

1

0

1,5

0

1

1

1

1,7 (default)

1

0

0

0

1,9

1

0

0

1

2,3

58h (SR1)

59h (SR2)

5Ah (SR3)

5Bh (SR4)

1

0

1

0

2,8