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ASL5015FHN 数据表(PDF) 40 Page - NXP Semiconductors |
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ASL5015FHN 数据表(HTML) 40 Page - NXP Semiconductors |
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40 / 69 page  NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) ASL5xxxyHz All information provided in this document is subject to legal disclaimers. © NXP B.V. 2019. All rights reserved. Product data sheet Rev. 2.1 — 5 February 2019 40 / 69 Address Register D7 D6 D5 D4 D3 D2 D1 D0 Reset 56 ReadCH11-LB PWM[7:0] 00000000 57 ReadCH11-MB unused PWM[11:8] 00000000 58 ReadCH12-LB PWM[7:0] 00000000 59 ReadCH12-MB unused PWM[11:8] 00000000 11 Direct PWM mode – ASL51xxyHz. The MLC ASL51xxyHz provides the possibility of sending direct PWM data to every channel. The microcontroller provides all the dimming curves; and the PWM duty cycle value must be updated in every PWM period, if the duty cycle has to be changed. Each channel needs 12 bits for the PWM duty cycle that can be updated every PWM cycle Full diagnosis is available in these part numbers. Because the amount of data in the bus is greater than in the smart mode (ASL50xxyHz), a higher baud rate may be needed. The available baud rates in the MLC are 125 Kbps, 250 Kbps, 500 Kbps and 1 Mbps. The communication interface data rate should be selected to fulfill the system latency requirement. This latency is the time from when the microcontroller sends the new PWM duty cycle value to the moment the MLC executes it. The addressing of the MLC is done using the Extended-ID. The Standard-ID is used for clock synchronization purpose with the fixed sequence/preamble equal to 555h. All the MLCs are synchronized in every CAN massage, ensuring a good synchronization between the different MLC ICs and a very accurate sampling clock, with an accuracy of less than 0.25 %. 11.1 ASL51xxSHy Register MAP Table 32. ASL51xxSHy register map Address Register D7 D6 D5 D4 D3 D2 D1 D0 Reset Values 0 DIRECT_CH1_LB PWM[7:0] 00000000 1 DIRECT_CH1_UB unused PWM[11:8] 00000000 2 DIRECT_CH2_LB PWM[7:0] 00000000 3 DIRECT_CH2_UB unused PWM[11:8] 00000000 4 DIRECT_CH3_LB PWM[7:0] 00000000 5 DIRECT_CH3_UB unused PWM[11:8] 00000000 6 DIRECT_CH4_LB PWM[7:0] 00000000 7 DIRECT_CH4_UB unused PWM[11:8] 00000000 8 DIRECT_CH5_LB PWM[7:0] 00000000 9 DIRECT_CH5_UB unused PWM[11:8] 00000000 A DIRECT_CH6_LB PWM[7:0] 00000000 B DIRECT_CH6_UB unused PWM[11:8] 00000000 C DIRECT_CH7_LB PWM[7:0] 00000000 D DIRECT_CH7_UB unused PWM[11:8] 00000000 E DIRECT_CH8_LB PWM[7:0] 00000000 |
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