ADP1048WARQZ-R7 datasheet(34/82 Pages) AD

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ADP1048W

Data Sheet

PMBus DIGITAL COMMUNICATION

The PMBus slave allows a device to interface to a PMBus-

compliant master device as specified by the PMBus Power

System Management Protocol Specification (Revision 1.1,

February 5, 2007). The PMBus slave is a 2-wire interface that

can be used to communicate with other PMBus-compliant

devices and is compatible in a multimaster, multislave bus

configuration.

FEATURES

The function of the PMBus slave is to decode the command sent

from the master device and respond as requested. Communi-

cation is established using an I2C-like 2-wire interface with

a clock line (SCL) and data line (SDA). The PMBus slave is

designed to externally move chunks of 8-bit data (bytes) while

maintaining compliance with the PMBus protocol. The PMBus

protocol is based on the SMBus Specification (Version 2.0,

August 2000). The SMBus specification is, in turn, based on

the Philips I2C Bus Specification (Version 2.1, January 2000).

The PMBus incorporates the following features:

•

Slave operation on multiple device systems

•

7-bit addressing

•

100 kHz and 400 kHz data rates

•

General call address support

•

Support for clock low extension

•

Separate multiple byte receive and transmit FIFO

•

Extensive fault monitoring

OVERVIEW

The PMBus slave module is a 2-wire interface that can be used

to communicate with other PMBus-compliant devices. Its trans-

fer protocol is based on the Philips I2C transfer mechanism. The

ADP1048W is always configured as a slave device in the overall

system. The ADP1048W communicates with the master device

using one data pin (SDA) and one clock pin (SCL). Because the

ADP1048W is a slave device, it cannot generate the clock signal.

However, it is capable of clock-stretching the SCL line to put the

master device in a wait state when it is not ready to respond to

the master request.

Communication is initiated when the master device sends a

command to the PMBus slave device. Commands can be read

or write commands, in which case, data is transferred between

the devices in a byte wide format. Commands can also be send

commands, in which case, the command is executed by the

slave device upon receiving the stop bit. The stop bit is the last

bit in a complete data transfer, as defined in the PMBus/I2C

communication protocol. During communication, the master

and slave devices send acknowledge (A) or no acknowledge

(A) bits as a method of handshaking between devices. See the

PMBus specification for a more detailed description of the

communication protocol.

When communicating with the master device, it is possible

for illegal or corrupted data to be received by the PMBus slave

device. In this case, the PMBus slave device responds to the

invalid command or data as defined by the PMBus specification,

and indicates to the master device that an error or fault condition

has occurred. This method of handshaking can be used as a first

level of defense against programming of the slave device that

can potentially damage the chip or system.

The PMBus specification defines a set of generic PMBus

commands that is recommended for a power management

system. However, each PMBus device manufacturer can choose

to implement and support certain commands as it deems fit for

its system. In addition, the PMBus device manufacturer can

choose to implement manufacturer-specific commands whose

functions are not included in the generic PMBus command set.

The list of standard PMBus and manufacturer-specific commands

can be found in the Standard PMBus Commands Supported by

the ADP1048Wsection and the Manufacturer-Specific PMBus

Command section.

PMBus ADDRESS

Control of the ADP1048W is implemented via the I2C interface.

The ADP1048W is connected to the bus as a slave device under

the control of a master device.

The PMBus address of the ADP1048W is set by connecting an

external resistor from the ADD pin to ground. Table 14 lists the

recommended resistor values and associated PMBus addresses.

Eight different addresses can be used.

Table 14. PMBus Address Settings

Address

ADD Pin Resistor Value (kΩ)

0x58

10 (or connect directly to AGND)

0x59

0x5A

0x5B

0x5C

0x5D

109

0x5E

128

0x5F

148 (or connect directly to VDD)

If an incorrect resistor value is used and the resulting I2C address is

close to a threshold between two addresses, the I2C_ADDRESS

flag is set (Bit 4 of Register 0xFE81). The recommended resistor

values in Table 14 can vary by ±2 kΩ. Therefore, it is recom-

mended that 1% tolerance resistors be used on the ADD pin.

The device responds to the standard PMBus broadcast address

(general call) of 0x00.

Rev. 0 | Page 34 of 82

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