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ADP5043ACPZ-1-R7 数据表(PDF) 13 Page - Analog Devices |
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ADP5043ACPZ-1-R7 数据表(HTML) 13 Page - Analog Devices |
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13 / 30 page ![]() Data Sheet ADP5043 Rev. C | Page 13 of 30 A CH3 86mA 2 3 1 VOUTx SW LOAD CH1 4V/DIV B W 20.0M CH2 50mV/DIV B W 20.0M CH3 50mA/DIV 1MΩ BW 20.0M 200µs/DIV 10MS/s 100ns/pt Figure 27. Buck Response to Load Transient, IOUT1 from 20 mA to 140 mA, VOUT1 = 3.3 V, Auto Mode 3 4 2 VOUT1 LOAD SW CH2 4V/DIV 1MΩ BW 20.0M CH3 50mV/DIV 1MΩ BW 20.0M CH4 50mA/DIV 1MΩ BW 20.0M 200µs/DIV 50MS/s 20ns/pt A CH3 145mA Figure 28. Buck Response to Load Transient, IOUT1 = 20 mA to 180 mA, VOUT1 = 1.8 V, PWM Mode 1 2 3 VOUTx IIN EN A CH2 1.14V CH1 1V/DIV 1MΩ BW 500M CH2 3V/DIV 1MΩ BW 500M CH3 50mA/DIV 1MΩ BW 20.0M 100µs/DIV 1MS/s 1.0µs/pt Figure 29. LDO Startup, VOUT2 = 3.3 V, IOUT2 = 5 mA 3.25 3.26 3.27 3.28 3.29 3.30 3.31 3.32 3.33 3.34 3.35 0.0001 0.001 0.01 0.1 OUTPUT CURRENT (A) 3.6V 4.5V 5.0V 5.5V Figure 30. LDO Load Regulation Across Input Voltage, VOUT2 = 3.3 V 3.25 3.26 3.27 3.28 3.29 3.30 3.31 3.32 3.33 3.34 3.35 0.0001 0.001 0.01 0.1 OUTPUT CURRENT (A) +85°C +25°C –40°C Figure 31. LDO Load Regulation Across Temperature, VIN2 = 3.6 V, VOUT2 = 3.3 V 3.280 3.285 3.290 3.295 3.300 3.305 3.310 3.315 3.320 3.325 3.5 4.5 5.0 5.5 INPUT VOLTAGE (V) 100µA 1mA 10mA 100mA 150mA Figure 32. LDO Line Regulation Across Output Load, VOUT2 = 3.3 V |
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