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AS3977 数据表(PDF) 33 Page - ams AG

部件名 AS3977
功能描述  Multi-Channel Narrowband FSK Transmitter
PDF  47 Pages
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制造商  AMSCO [ams AG]
网页  http://www.ams.com
标志 AMSCO - ams AG

AS3977 数据表(HTML) 33 Page - ams AG

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www.austriamicrosystems.com/AS3977
Revision 3.6
33 - 47
AS3977
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
9.7 Special Bits
The following paragraphs provide a brief description of special bits used for Transmitter Interface functionality.
9.7.1 LT (Lock Transmit)
The Lock Transmit bit will be set each time the circuit goes in Power Down Mode. When the bit is set, the power amplifier of the AS3977 cannot
be activated. TX commands will be anyway accepted but without any “external” and visible effect.
A low has to be written before starting any RF-Transmission. The first write command can be responsible for a wake up event of the circuit and
to release Power Down Mode, which will lead to the inactive state. This signal will be activated whenever the power supply is dramatically under
the threshold for safe workings of analog circuits during transmit operations. If the supply voltage is under the threshold during transmit, the read
back value is “1” and this can indicate a non finished transmission.
9.7.2 LS (Low Power Supply Voltage)
Low power Supply voltage (LS) is a read/write bit, which indicates that the power amplifier supply voltage level (VCCPA) is below a certain
threshold voltage (see Table 13). After an increase of the power supply voltage above the threshold level (plus a hysteresis), this bit has to be
reset to zero via SPI. The bit condition has no influence on the operation of the IC. LS and LT monitor the VCCPA supply (they are only working
if Voltage is applied to VCCPA). As they are working with the same VREF generator that will be supplied from VCCPA, an overlap of the
threshold levels will never occur. LS is an indicator whereby LT switches off the PA hard coded.
9.7.3 MCCS, CLKS and PSC
These bits are used to set the micro controller clock functionality and to control the associated MCCLK bi-directional and multi-functional pad.
MCCS stands for Micro Controller Clock output Selection and it declares how the MCCLK pad will be used. Depending on the level of DATAIO by
leaving the Power Down Mode, this setting can be left unchanged from the last written value (DATAIO=1) or it can be set to the default value
(DATAIO=0). Default MCCS value is “11” then the MCCLK pad is used as output and the clock is always active.
CLKS stands for Clock Selection and it is used to select as MCCLK pre-scaler or baud rate output. Default value is the pre-scaler output.
PSC stands for Pre-scaler and it is the two’s exponent for first crystal oscillator division ratio. Default value is “100” that means a division ratio of
2
4 = 16.
By leaving the Power Down Mode and if DATAIO is sampled LOW, these bits are set to their default values and then as soon as the crystal
oscillator is on, the MCCLK will be active and with a frequency that is 1/16 of the crystal oscillator working frequency.
9.7.4 SETPD (Set Power Down)
This bit is used to force the circuit to go in Power Down Mode (see Software Power Down Method on page 26). When the circuit is in Power
Down Mode, this bit is reset to ZERO to avoid a dead lock condition. The Power Down Mode can be reached by writing a ONE to this bit
whenever a fast transition to the Power Down Mode is needed.
N<15:9>
-
0000000
reserved Bits: set to Binary 0000000 for normal mode
of operation
Temperature Sensor and Lock Detector Output (read only)
O<9:0>
TS<9:0>
-
Temperature sensor output
O<10>
LD
-
Lock detector output
O<15:11>
-
-
reserved
Table 23. Configuration Registers Description
Register
Name
Default Value
Description



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