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STM32F373VC 数据表(PDF) 73 Page - STMicroelectronics |
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STM32F373VC 数据表(HTML) 73 Page - STMicroelectronics |
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73 / 137 page  DocID022691 Rev 7 73/137 STM32F373xx Electrical characteristics 114 Figure 12. High-speed external clock source AC timing diagram Low-speed external user clock generated from an external source In bypass mode the LSE oscillator is switched off and the input pin is a standard GPIO. The external clock signal has to respect the I/O characteristics in Section 6.3.14. However, the recommended clock input waveform is shown in Figure 13. Table 39. Low-speed external user clock characteristics Symbol Parameter(1) 1. Guaranteed by design. Conditions Min Typ Max Unit fLSE_ext User External clock source frequency - - 32.768 1000 kHz VLSEH OSC32_IN input pin high level voltage -0.7VDD -VDD V VLSEL OSC32_IN input pin low level voltage -VSS -0.3VDD tw(LSEH) tw(LSEL) OSC32_IN high or low time - 450 - - ns tr(LSE) tf(LSE) OSC32_IN rise or fall time - - - 50 |
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