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STM32F373VC 数据表(PDF) 26 Page - STMicroelectronics |
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STM32F373VC 数据表(HTML) 26 Page - STMicroelectronics |
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26 / 137 page ![]() Functional overview STM32F373xx 26/137 DocID022691 Rev 7 3.20 Universal synchronous/asynchronous receiver transmitter (USART) The STM32F373xx embeds three universal synchronous/asynchronous receiver transmitters (USART1, USART2 and USART3). All USARTs interfaces are able to communicate at speeds of up to 9 Mbit/s. They provide hardware management of the CTS and RTS signals, they support IrDA SIR ENDEC, the multiprocessor communication mode, the single-wire half-duplex communication mode, Smartcard mode (ISO/IEC 7816 compliant), autobaudrate feature and have LIN Master/Slave capability. The USART interfaces can be served by the DMA controller. Refer to Table 8 for the features of USART1, USART2 and USART3. SMBus X X Wakeup from STOP X X 1. X = supported. Table 7. STM32F373xx I2C implementation (continued) I2C features(1) I2C1 I2C2 Table 8. STM32F373xx USART implementation USART modes/features(1) 1. X = supported. USART1 USART2 USART3 Hardware flow control for modem X X X Continuous communication using DMA X X X Multiprocessor communication X X X Synchronous mode X X X Smartcard mode X X X Single-wire half-duplex communication X X X IrDA SIR ENDEC block X X X LIN mode X X X Dual clock domain and wakeup from Stop mode X X X Receiver timeout interrupt X X X Modbus communication X X X Auto baud rate detection X X X Driver Enable X X X |
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