STM32F373VC datasheet(28/137 Pages) STMICROELECTRONICS

28 / 137 page

Functional overview

STM32F373xx

28/137

DocID022691 Rev 7

3.24

Universal serial bus (USB)

The STM32F373xx embeds an USB device peripheral compatible with the USB full-speed

12 Mbs. The USB interface implements a full-speed (12 Mbit/s) function interface. It has

software-configurable endpoint setting and suspend/resume support. The dedicated 48

MHz clock is generated from the internal main PLL (the clock source must use a HSE

crystal oscillator).

3.25

Serial wire JTAG debug port (SWJ-DP)

The ARM SWJ-DP Interface is embedded, and is a combined JTAG and serial wire debug

port that enables either a serial wire debug or a JTAG probe to be connected to the target.

The JTAG TMS and TCK pins are shared respectively with SWDIO and SWCLK and a

specific sequence on the TMS pin is used to switch between JTAG-DP and SW-DP.

3.26

Embedded trace macrocell™

The ARM embedded trace macrocell provides a greater visibility of the instruction and data

flow inside the CPU core by streaming compressed data at a very high rate from the

STM32F373xx through a small number of ETM pins to an external hardware trace port

analyzer (TPA) device. The TPA is connected to a host computer using USB, Ethernet, or

any other high-speed channel. Real-time instruction and data flow activity can be recorded

and then formatted for display on the host computer running debugger software. TPA

hardware is commercially available from common development tool vendors. It operates

with third party debugger software tools.

STM32F373VC 数据表(PDF) 28 Page - STMicroelectronics