| 数据搜索系统,热门电子元器件搜索 |
|
ADE7933 数据表(PDF) 10 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADE7933 数据表(HTML) 10 Page - Analog Devices |
|
10 / 125 page ![]() ADE7978/ADE7933/ADE7932/ADE7923 Data Sheet Rev. D | Page 10 of 125 ADE7978 SPECIFICATIONS VDD = 3.3 V ± 10%, GND = DGND = 0 V, XTALIN = 16.384 MHz, TMIN to TMAX = −40°C to +85°C, TTYP = 25°C. Table 2. Parameter1, 2 Min Typ Max Unit Test Conditions/Comments CLOCK INPUT All specifications for CLKIN = 16.384 MHz Input Clock Frequency (CLKIN) 16.22 16.384 16.55 MHz Minimum = 16.384 MHz − 1%, maximum = 16.384 MHz + 1% XTALIN Logic Inputs Input High Voltage, V INH 2.4 V Input Low Voltage, V INL 0.8 V XTALIN Total Capacitance3 40 pF XTALOUT Total Capacitance3 40 pF CLOCK OUTPUT Output Clock Frequency at CLKOUT Pin 4.096 MHz Duty Cycle 50 % Output High Voltage, V OH 2.4 V I SOURCE 4.8 mA Output Low Voltage, V OL 0.4 V I SINK 4.8 mA LOGIC INPUTS—MOSI/SDA, SCLK/SCL, SS/HSA, DATA_A, DATA_B, DATA_C, DATA_N Input High Voltage, V INH 2.4 V VDD = 3.3 V ± 10% Input Current, I IN 2 40 nA Input = VDD = 3.3 V Input Low Voltage, V INL 0.8 V VDD = 3.3 V ± 10% Input Current, I IN 5 180 nA Input = 0 V, VDD = 3.3 V Input Capacitance, C IN 10 pF LOGIC INPUT—RESET Input High Voltage, V INH 2.4 V VDD = 3.3 V ± 10% Input Current, I IN 80 160 nA Input = VDD = 3.3 V Input Low Voltage, V INL 0.8 V VDD = 3.3 V ± 10% Input Current, I IN −8 +11 µA Input = 0 V, VDD = 3.3 V Input Capacitance, C IN 10 pF LOGIC OUTPUTS—IRQ0, IRQ1, MISO/HSD, CLKOUT, SYNC, VT_A, VT_B, VT_C, VT_N, ZX/DREADY, RESET_EN VDD = 3.3 V ± 10% Output High Voltage, V OH 2.4 V VDD = 3.3 V I SOURCE 4.8 mA Output Low Voltage, V OL 0.4 V VDD = 3.3 V ± 10% I SINK 4.8 mA CF1, CF2, CF3/HSCLK Output High Voltage, V OH 2.4 V VDD = 3.3 V ± 10% I SOURCE 8 mA Output Low Voltage, V OL 0.4 V VDD = 3.3 V ± 10% I SINK 8.5 mA POWER SUPPLY For specified performance VDD Pin 2.97 3.63 V Minimum = 3.3 V − 10%, maximum = 3.3 V + 10% I DD 10.6 15.5 mA 1 See the Typical Performance Characteristics section. 2 See the Terminology section for a definition of the parameters. 3 XTALIN/XTALOUT total capacitances refer to the net capacitances on each pin. Each capacitance is the sum of the parasitic capacitance at the pin and the capacitance of the ceramic capacitor connected between the pin and GND. See the ADE7978, ADE7933/ADE7932, and ADE7923 Clocks section for more information. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |