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ADN8834ACPZ-R2 数据表(PDF) 14 Page - Analog Devices |
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ADN8834ACPZ-R2 数据表(HTML) 14 Page - Analog Devices |
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14 / 27 page ![]() ADN8834 Data Sheet Rev. B | Page 14 of 27 ANALOG PID CONTROL The ADN8834 integrates two self-correcting, auto-zeroing amplifiers (Chopper 1 and Chopper 2). The Chopper 1 amplifier takes a thermal sensor input and converts or regulates the input to a linear voltage output. The OUT1 voltage is proportional to the object temperature. The OUT1 voltage is fed into the compensation amplifier (Chopper 2) and is compared with a temperature setpoint voltage, which creates an error voltage that is proportional to the difference. For autonomous analog temperature control, Chopper 2 can be used to implement a PID network as shown in Figure 27 to set the overall stability and response of the thermal loop. Adjusting the PID network optimizes the step response of the TEC control loop. A compromised settling time and the maximum current ringing become available when this adjustment is done. To adjust the compensation network, see the PID Compensation Amplifier (Chopper 2) section. DIGITAL PID CONTROL The ADN8834 can also be configured for use in a software controlled PID loop. In this scenario, the Chopper 1 amplifier can either be left unused or configured as a thermistor input amplifier connected to an external temperature measurement analog-to-digital converter (ADC). For more information, see the Thermistor Amplifier (Chopper 1) section. If Chopper 1 is left unused, tie IN1N and IN1P to AGND. The Chopper 2 amplifier is used as a buffer for the external DAC, which controls the temperature setpoint. Connect the DAC to IN2P and short the IN2N and OUT2 pins together. See Figure 27 for an overview of how to configure the ADN8834 external circuitry for digital PID control. POWERING THE CONTROLLER The ADN8834 operates at an input voltage range of 2.7 V to 5.5 V that is applied to the VDD pin and the PVIN pin for the WLCSP (the PVINS pin and PVINL pin for the LFCSP. The VDD pin is the input power for the driver and internal reference. The PVIN input power pins are combined for both the linear and the switching driver. Apply the same input voltage to all power input pins: VDD and PVIN. In some circumstances, an RC low- pass filter can be added optionally between the PVIN for the WLCSP (PVINS and PVINL for the LFCSP) and VDD pins to prevent high frequency noise from entering VDD, as shown in Figure 27. The capacitor and resistor values are typically 10 Ω and 100 nF, respectively. When configuring power supply to the ADN8834, keep in mind that at high current loads, the input voltage may drop substantially due to a voltage drop on the wires between the front-end power supply and the PVIN for the WLCSP (PVINS and PVINL for the LFCSP) pin. Leave a proper voltage margin when designing the front-end power supply to maintain the performance. Minimize the trace length from the power supply to the PVIN for the WLCSP (PVINS and PVINL for the LFCSP) pin to help mitigate the voltage drop. ADN8834 L = 1µH VIN 2.7V TO 5.5V TEC SW SFB LDR PGNDS PVIN VDD ILIM VLIM/SD ITEC IN2P VTEC TEC VOLTAGE LIMIT 2.5V VREF + – EN/SY CSW_OUT 10µF FSW = 2MHz CL_OUT 0.1µF CIN 10µF CVDD 0.1µF PGNDL ENABLE IN1N IN1P VREF AGND IN2N OUT2 OUT1 RV1 RV2 RC1 RC2 COOLING AND HEATING TEC CURRENT LIMITS CVREF 0.1uF RA R 2.5V VREF TEC VOLTAGE READBACK TEC CURRENT READBACK TEMPERATURE SET RB RFB RBP RX NTC THERMISTER RTH TEMPERATURE READBACK ADC DAC 2.5V VREF 2.5V VREF Figure 27. TEC Controller in a Digital Temperature Control Loop (WLCSP) |
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