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ADN8834ACPZ-R2 数据表(PDF) 21 Page - Analog Devices

部件名 ADN8834ACPZ-R2
功能描述  Ultracompact, 1.5 A Thermoelectric Cooler (TEC) Controller
PDF  27 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADN8834ACPZ-R2 数据表(HTML) 21 Page - Analog Devices

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Data Sheet
ADN8834
Rev. B | Page 21 of 27
This voltage drop is proportional to the value of the DCR and it
reduces the output voltage range at the TEC.
When selecting an inductor, ensure that the saturation current
rating is higher than the maximum current peak to prevent sat-
uration. In general, ceramic multilayer inductors are suitable for low
current applications due to small size and low DCR. When the
noise level is critical, use a shielded ferrite inductor to reduce the
electromagnetic interference (EMI).
Table 7. Recommended Inductors
Vendor
Value
Device No.
Footprint
Toko
1.0 µH ± 20%,
2.6 A (typical)
DFE201612R-H-1R0M
2.0 × 1.6
Taiyo
Yuden
1.0 µH ± 20%,
2.2 A (typical)
MAKK2016T1R0M
2.0 × 1.6
Murata
1.0 µH ± 20%,
2.3 A (typical)
LQM2MPN1R0MGH
2.0 × 1.6
Capacitor Selection
The output capacitor selection determines the output voltage
ripple, transient response, as well as the loop dynamic response
of the PWM amplifier output. Use the following equation to
select the capacitor:
(
)
OUT
SW
IN
OUT
SW
IN
OUT
SW
V
f
L
V
V
V
V
C
×
×
×
×
×
=
2
_
_
)
(
8
Note that the voltage caused by the product of current ripple,
ΔIL, and the capacitor equivalent series resistance (ESR) also
add up to the total output voltage ripple. Selecting a capacitor
with low ESR can increase overall regulation and efficiency
performance.
Table 8. Recommended Capacitors
Vendor
Value
Device No.
Footprint
(mm)
Murata
10 µF ±
10%, 10 V
ZRB18AD71A106KE01L
1.6 × 0.8
Murata
10 µF ±
20%, 10 V
GRM188D71A106MA73
1.6 × 0.8
Taiyo
Yuden
10 µF ±
20%, 10 V
LMK107BC6106MA-T
1.6 × 0.8
INPUT CAPACITOR SELECTION
On the PVIN pin, the amplifiers require an input capacitor
to decouple the noise and to provide the transient current to
maintain a stable input and output voltage. A 10 µF ceramic
capacitor rated at 10 V is the minimum recommended value.
Increasing the capacitance reduces the switching ripple that
couples into the power supply but increases the capacitor size.
Because the current at the input terminal of the PWM amplifier
is discontinuous, a capacitor with low effective series inductance
(ESL) is preferred to reduce voltage spikes.
In most applications, a decoupling capacitor is used in parallel
with the input capacitor. The decoupling capacitor is usually a
100 nF ceramic capacitor with very low ESR and ESL, which
provides better noise rejection at high frequency bands.
POWER DISSIPATION
This section provides guidelines to calculate the power
dissipation of the ADN8834. Approximate the total power
dissipation in the device by
PLOSS = PPWM + PLINEAR
where:
PLOSS is the total power dissipation in the ADN8834.
PLINEAR is the power dissipation in the linear regulator.
PWM Regulator Power Dissipation
The PWM power stage is configured as a buck regulator and
its dominant power dissipation (PPWM) includes power switch
conduction losses (PCOND), switching losses (PSW), and transition
losses (PTRAN). Other sources of power dissipation are usually
less significant at the high output currents of the application
thermal limit and can be neglected in approximation.
Use the following equation to estimate the power dissipation of
the buck regulator:
PLOSS = PCOND + PSW + PTRAN
Conduction Loss (PCOND)
The conduction loss consists of two parts: inductor conduction
loss (PCOND_L) and power switch conduction loss (PCOND_S).
PCOND = PCOND_L + PCOND_S
Inductor conduction loss is proportional to the DCR of the output
inductor, L. Using an inductor with low DCR enhances the overall
efficiency performance. Estimate inductor conduction loss by
PCOND_L = DCR × IOUT2
Power switch conduction losses are caused by the flow of the
output current through both the high-side and low-side power
switches, each of which has its own internal on resistance (RDSON).
Use the following equation to estimate the amount of power
switch conduction loss:
PCOND_S = (RDSON_HS × D + RDSON_LS × (1 − D)) × IOUT2
where:
RDSON_HS is the on resistance of the high-side MOSFET.
D is the duty cycle (D = VOUT/VIN).
RDSON_LS is the on resistance of the low-side MOSFET.



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