数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ADN8834ACPZ-R2 数据表(PDF) 20 Page - Analog Devices

部件名 ADN8834ACPZ-R2
功能描述  Ultracompact, 1.5 A Thermoelectric Cooler (TEC) Controller
PDF  27 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADN8834ACPZ-R2 数据表(HTML) 20 Page - Analog Devices

Back Button ADN8834ACPZ-R2 Datasheet HTML 16Page - Analog Devices ADN8834ACPZ-R2 Datasheet HTML 17Page - Analog Devices ADN8834ACPZ-R2 Datasheet HTML 18Page - Analog Devices ADN8834ACPZ-R2 Datasheet HTML 19Page - Analog Devices ADN8834ACPZ-R2 Datasheet HTML 20Page - Analog Devices ADN8834ACPZ-R2 Datasheet HTML 21Page - Analog Devices ADN8834ACPZ-R2 Datasheet HTML 22Page - Analog Devices ADN8834ACPZ-R2 Datasheet HTML 23Page - Analog Devices ADN8834ACPZ-R2 Datasheet HTML 24Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 20 / 27 page
background image
ADN8834
Data Sheet
Rev. B | Page 20 of 27
MOSFET DRIVER AMPLIFIERS
The ADN8834 has two separate MOSFET drivers: a switched
output or pulse-width modulated (PWM) amplifier, and a high
gain linear amplifier. Each amplifier has a pair of outputs that drive
the gates of the internal MOSFETs, which, in turn, drive the TEC as
shown in Figure 33. A voltage across the TEC is monitored via
the SFB and LDR pins. Although both MOSFET drivers achieve
the same result, to provide constant voltage and high current,
their operation is different. The exact equations for the two
outputs are
VLDR = VB − 40(VOUT2 − 1.25 V)
VSFB = VLDR + 5(VOUT2 − 1.25 V)
where:
VOUT2 is the voltage at OUT2.
VB is determined by VVDD as
VB = 1.5 V for VVDD < 4.0 V
VB = 2.5 V for VVDD > 4.0 V
The compensation network that receives the temperature set voltage
and the thermistor voltage fed by the input amplifier determines
the voltage at OUT2. VLDR and VSFB have a low limit of 0 V and
an upper limit of VVDD. Figure 37, Figure 38, and Figure 39 show
the graphs of these equations.
OUT2 (V)
1.25
0.75
0.25
0
1.75
2.25
2.75
–2.5
2.5
7.5
0
5.0
VSYS = 5.0V
VSYS = 3.3V
Figure 37. LDR Voltage vs. OUT2 Voltage
OUT2 (V)
1.25
0.75
0.25
0
1.75
2.25
2.75
–2.5
2.5
7.5
0
5.0
VSYS = 5.0V
VSYS = 3.3V
Figure 38. SFB Voltage vs. OUT2 Voltage
–2.5
–5.0
0
2.5
5.0
OUT2 (V)
VSYS = 5.0V
VSYS = 3.3V
1.25
0.75
0.25
0
1.75
2.25
2.75
Figure 39. TEC Voltage vs. OUT2 Voltage
PWM OUTPUT FILTER REQUIREMENTS
A type three compensator internally compensates the PWM
amplifier. As the poles and zeros of the compensator are designed
and fixed by assuming the resonance frequency of the output
LC tank being 50 kHz, the selection of the inductor and the
capacitor must follow this guideline to ensure system stability.
Inductor Selection
The inductor selection determines the inductor current ripple and
loop dynamic response. Larger inductance results in smaller
current ripple and slower transient response as smaller inductance
results in the opposite performance. To optimize the performance,
the trade-off must be made between transient response speed,
efficiency, and component size. Calculate the inductor value
with the following equation:
(
)
L
SW
IN
OUT
SW
IN
OUT
SW
I
f
V
V
V
V
L
×
×
×
=
_
_
where:
VSW_OUT is the PWM amplifier output.
fSW is the switching frequency (2 MHz by default).
∆IL is the inductor current ripple.
A 1 µH inductor is typically recommended to allow reasonable
output capacitor selection while maintaining a low inductor current
ripple. If lower inductance is required, a minimum inductor value
of 0.68 µH is suggested to ensure that the current ripple is set to
a value between 30% and 40% of the maximum load current,
which is 1.5 A.
Except for the inductor value, the equivalent dc resistance (DCR)
inherent in the metal conductor is also a critical factor for
inductor selection. The DCR accounts for most of the power loss
on the inductor by DCR × IOUT2. Using an inductor with high
DCR degrades the overall efficiency significantly. In addition,
there is a conduct voltage drop across the inductor because of
the DCR. When the PWM amplifier is sinking current in cooling
mode, this voltage drives the minimum voltage of the amplifier
higher than 0.06 × VIN by at least tenth of millivolts. Similarly, the
maximum PWM amplifier output voltage is lower than 0.93 × VIN.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com