ADE7912 datasheet(9/41 Pages) AD

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Data Sheet

ADE7912/ADE7913

Rev. C | Page 9 of 41

TIMING CHARACTERISTICS

VDD = 3.3 V ± 10%, GND = 0 V, on-chip reference, CLKIN = 4.096 MHz, TMIN to TMAX = −40°C to +85°C.

Table 5. SPI Interface Timing Parameters

Parameter

Symbol

Min

Max

Unit

CS to SCLK Positive Edge

tSS

SCLK Frequency1

250

5600

kHz

SCLK Low Pulse Width

tSL

SCLK High Pulse Width

tSH

Data Output Valid After SCLK Edge

tDAV

Data Input Setup Time Before SCLK Edge

tDSU

Data Input Hold Time After SCLK Edge

tDHD

Data Output Fall Time

tDF

Data Output Rise Time

tDR

SCLK Rise Time

tSR

SCLK Fall Time

tSF

MISO Disable After CS Rising Edge

tDIS

CS High After SCLK Edge

tSFS

Minimum and maximum specifications are guaranteed by design.

MSB

LSB

LSB IN

INTERMEDIATE BITS

tSFS

tDIS

tSS

tSL

tDF

tSH

tDHD

tDAV

tDSU

tSR

tSF

tDR

MSB IN

MOSI

MISO

SCLK

Figure 5. SPI Interface Timing

2mA

IOL

800µA

IOH

1.6V

TO OUTPUT

50pF

Figure 6. Load Circuit for Timing Specifications

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