ADE9430 datasheet(30/35 Pages) AD

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Data Sheet

ADE9430

THEORY OF OPERATION

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Rev. 0 | 30 of 35

Figure 50. Current Channel Signal Chain Preceding Zero-Crossing Detection

CF3/ZX

The CF3/ZX pin can output zero crossings using the CF3_CFG bit

in the CONFIG1 register. To configure the source for zero crossing,

use the ZX_SEL bits in ZX_LP_SEL register. The CF3/ZX output

pin goes from low to high when a negative to positive transition is

detected and from high to low when a positive to negative transition

occurs.

See the ADE9430 Technical Reference Manual for additional infor-

mation.

Zero-Crossing Timeout

If a zero crossing is not received after (ZXTOUT + 1)/8000 sec,

the corresponding ZXTOx bit in the STATUS1 register is set and

generates an interrupt on the IRQ1 pin.

See the ADE9430 Technical Reference Manual for additional infor-

mation.

Line Period Calculation

The ADE9430 calculates the line period for the Phase A, Phase B,

and Phase C voltages and the combined voltage signal, and the

results are available in the APERIOD, BPERIOD, CPERIOD, and

COM_PERIOD registers, respectively.

Calculate the line period, tL, from the xPERIOD register, according

to the following equation:

tL = xPERIOD+1

8000×216

(sec)

(11)

If the calculated period value is outside the 40 Hz to 70 Hz range,

or if zero crossings for that phase are not detected, the xPERIOD

SELFREQ bit in the ACCMODE register.

See the ADE9430 Technical Reference Manual for additional infor-

mation.

Figure 51. Line Period Selection for Resampling

Angle Measurement

The ADE9430 provides nine angle measurements. ANGL_IA_IB,

ANGL_IB_IC, and ANGL_IA_IC provide phase angle between cur-

rents. ANGL_VA_VB, ANGL_VB_VC, and ANGL_VA_VC provide

phase angle between voltages. ANGL_VA_IA, ANGL_VB_IB, and

ANGL_VC_IC provide phase angle between voltage and currents.

To convert angle register reading to degrees, use the following

equations.

For a 50 Hz system,

Angle (Degrees) = ANGL_x_y × 0.017578125

For a 60 Hz system,

Angle (Degrees) = ANGL_x_y × 0.02109375

See the ADE9430 Technical Reference Manual for additional infor-

mation.

Phase Sequence Error Detection

The ADE9430 monitors phase sequences and sets the SEQERR

bit in the STATUS1 register if a sequence error occurs or a phase

drops below ZXTHRSH. SEQ_CYC determines the number of

cycles to monitor to generate the sequence error. To generate an

interrupt on IRQ1, set the SEQERR bit in the MASK1 register.

See the ADE9430 Technical Reference Manual for additional infor-

mation.

One-Cycle RMS Measurement

One-cycle rms is an rms measurement performed over one line

cycle, updated every period not synchronized to zero crossings.

This measurement is provided for voltage and current on all phases

plus the neutral current. All the one cycle rms measurements are

performed over the same time interval and update at the same

time, as indicated by the RMSONERDY bit in the STATUS0 regis-

ter. The results are stored in the AIRMSONE, BIRMSONE, CIRM-

SONE, NIRMSONE, AVRMSONE, BVRMSONE, and CVRMSONE

registers. The xRMSONE register reading with full-scale inputs is

52,702,092d.

It is recommended to select the data before the high-pass filter for

the one cycle measurement by setting the RMS_SRC_SEL bit in

the CONFIG0 register.

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