ADE9430 datasheet(24/35 Pages) AD

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Data Sheet

ADE9430

THEORY OF OPERATION

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ADC_REDIRECT Multiplexer

The ADE9430 provides a multiplexer that allows any ADC output to

be redirected to any digital processing datapath (see Figure 40).

By default, each modulator is mapped to its corresponding data-

path. See the ADE9430 Technical Reference Manual for additional

information.

Figure 40. ADC_REDIRECT Modulator to Digital Datapath Multiplexing

Current Channel Gain, xIGAIN

The ADE9430 provides current gain calibration registers (AIGAIN,

BIGAIN, CIGAIN, and NIGAIN), one for each current channel.

The current channel gain varies with xIGAIN as shown in the

following equation:

Current Channel Gain = (1 + (xIGAIN/227))

See the ADE9430 Technical Reference Manual for additional infor-

mation.

IB Calculation Using ICONSEL

Write to the ICONSEL bit in the ACCMODE register to calculate

IB = −IA − IC. This setting can help save the cost of a current

transformer in some 3-wire delta configurations. See the ADE9430

Technical Reference Manual for additional information.

High-Pass Filter

A high-pass filter removes dc offsets for accurate rms and energy

measurements. This filter is enabled by default with a corner fre-

quency of 1.25 Hz.

To disable the high-pass filter on all current and voltage channels

set the HPFDIS bit in the CONFIG0 register. The corner frequency

is configured with the HPF_CRN bits in the CONFIG2 register.

See the ADE9430 Technical Reference Manual for additional infor-

mation.

Phase Compensation

The ADE9430 provides a phase compensation register for

each current channel: APHCALx, BPHCALx, CPHCALx, and

NPHCAL.

The phase calibration range is −15° to +2.25° at 50 Hz and −15° to

+2.7° at 60 Hz.

Use the following equation to calculate the xPHCALx value for a

given phase correction (φ)° angle. Phase correction (φ)° is positive

to correct a current that lags the voltage and negative to correct a

current that leads the voltage, as seen in a current transformer.

xPHCALx = sinϕ–ω +sinω

sin2ω – ϕ

×227 (3)

ω = 2π × fLINE/fDSP

where:

fLINE is the line frequency.

fDSP is 8 kHz.

See the ADE9430 Technical Reference Manual for additional infor-

mation.

Multipoint Phase and Gain Calibration

The ADE9430 allows multipoint gain and phase compensation with

hysteresis on the IA, IB, and IC current channels. The multipoint

gain and phase compensation is not applied the resampled data.

The current channel gain and phase compensation vary as a

function of the calculated input current rms amplitude in xIRMS.

There are five gain registers (xIGAIN0 to xIGAIN4) and five phase

calibration registers (xPHCAL0 to xPHCAL4) for each channel. Set

the MTEN bit in the CONFIG0 register to enable multipoint gain and

phase calibration. MTEN = 0 by default.

The gain and phase calibration factor is applied based on

the xIRMS current amplitude and the MTTHR_Lx and the

MTTHR_Hx register values, as shown in Figure 41.

See the ADE9430 Technical Reference Manual for additional infor-

mation.

Figure 41. Multipoint Phase and Gain Calibration

Voltage Channel

The ADE9430 has three voltage channels. The datapaths for the

VA, VB, and VC voltage channels are shown in Figure 42. The

xVGAIN registers calibrate the voltage channel of each phase. The

xVGAIN registers have the same scaling as the xIGAIN registers.

See the ADE9430 Technical Reference Manual for additional infor-

mation.

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