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ADE9430 数据表(PDF) 32 Page - Analog Devices |
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ADE9430 数据表(HTML) 32 Page - Analog Devices |
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32 / 35 page ![]() Data Sheet ADE9430 THEORY OF OPERATION analog.com Rev. 0 | 32 of 35 10 Cycle RMS/12 Cycle RMS The 10 cycle rms/12 cycle rms measurement is performed over 10 cycles on a 50 Hz network or 12 cycles on a 60 Hz network. The SELFREQ bit in the ACCMODE register selects whether the network is 50 Hz or 60 Hz. Then, the UPERIOD_SEL bit in the CONFIG2 register selects whether to use a measured line period or a user configured value in the USER_PERIOD register to set the number of samples used in the calculation. An offset correction register is available for improved performance with small input signal levels, xRMS1012OS. The xRMS1012 regis- ter reading with full-scale inputs is 52,702,092d. The signal chain is shown in Figure 52. See the ADE9430 Technical Reference Manual for additional information. Overcurrent Indication The ADE9430 monitors the one cycle value on current channels to determine overcurrent events. If a one cycle rms current is greater than the user configured threshold in the OILVL register, the OI bit in the STATUS1 register is set. The overcurrent event generates an interrupt on the IRQ1 pin. The OC_EN bits in the CONFIG3 register select which phases to monitor for overcurrent events. The OIPHASE bits in the OISTATUS register indicate which current channels exceeded the threshold. The overcurrent value is stored in the corresponding OIA, OIB, or OIC registers. See the ADE9430 Technical Reference Manual for additional infor- mation. Peak Detection The ADE9430 records the peak value measured on the current and voltage channels from the xI_PCF and xV_PCF waveforms. The PEAKSEL bits in the CONFIG3 register allow the user to select which phases to monitor. The IPEAK register stores the peak current value in the IPEAKVAL bits and indicates which phase currents reached the value in the IPPHASE bits. IPEAKVAL is equal to xI_PCF/25. Similarly, VPEAK stores the peak voltage value in the VPEAKVAL bits. VPEAKVAL is equal to xV_PCF/25. After a read, the VPEAK and IPEAK registers reset. See the ADE9430 Technical Reference Manual for additional infor- mation. Power Factor The power factor calculation, one for each channel (APF, BPF, and CPF), is updated every 1.024 sec. The sign of the APF calculation follows the sign of AWATT. To determine if power factor is leading or lagging, refer to the sign of the total or fundamental reactive energy and the sign of the xPF or xWATT value, as indicated in Figure 53. See the ADE9430 Technical Reference Manual for additional infor- mation. Figure 53. Active Power and VAR Sign for Capacitive and Inductive Loads The power factor result is stored in 5.27 format. The highest power factor value is 0x07FF FFFF, which corresponds to a power factor of 1. A power factor of −1 is stored as 0xF800 0000. To determine the power factor from the xPF register value, use the following equation: Power Factor = xPF × 2−27 Total Harmonic Distortion (THD) A THD calculation is available on the IA, IB, IC, VA, VB, and VC channels in the ADSW-PQ-CLS Power Quality Library. To request access to the ADSW-PQ-CLS, fill out the software request form at: Software Request Form | Analog Devices, where the target technol- ogy must be power quality monitoring and the processor/system on chip (SoC) is the ADE9430. Resampling The ADE9430 resamples the input data to provide 1024 points for 10/12 cycles, selected by SELFREQ. The resampled data is available for all current channels and voltage channels in the waveform buffer. Each resampled waveform sample is stored as a 16-bit signed integer in the waveform buffer. See the ADE9430 Technical Reference Manual for additional information. Temperature The temperature reading is available in the TEMP_RSLT register. To convert the temperature range into Celsius, use the following equation: Temperature (°C) = TEMP_RSLT × (−TEMP_GAIN/65536) + (TEMP_OFFSET/32) During manufacturing of each device, the TEMP_GAIN and TEMP_OFFSET bits of Register TEMP_TRIM are programed. To |
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