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DVR 数据表(PDF) 215 Page - Microchip Technology

部件名 DVR
功能描述  16-Bit General Purpose Microcontrollers with 256-Kbyte Flash and 16-Kbyte RAM in Low Pin Count Packages
PDF  416 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

DVR 数据表(HTML) 215 Page - Microchip Technology

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 2016-2018 Microchip Technology Inc.
DS30010118D-page 215
PIC24FJ256GA705 FAMILY
REGISTER 17-10: SPIxIMSKH: SPIx INTERRUPT MASK REGISTER HIGH
R/W-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
RXWIEN
—
RXMSK5(1) RXMSK4(1,4)
RXMSK3(1,3)
RXMSK2(1,2)
RXMSK1(1)
RXMSK0(1)
bit 15
bit 8
R/W-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
TXWIEN
—TXMSK5(1)
TXMSK4(1,4)
TXMSK3(1,3)
TXMSK2(1,2)
TXMSK1(1)
TXMSK0(1)
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
RXWIEN: Receive Watermark Interrupt Enable bit
1 = Triggers receive buffer element watermark interrupt when RXMSK<5:0>  RXELM<5:0>
0 = Disables receive buffer element watermark interrupt
bit 14
Unimplemented: Read as ‘0’
bit 13-8
RXMSK<5:0>: RX Buffer Mask bits(1,2,3,4)
RX mask bits; used in conjunction with the RXWIEN bit.
bit 7
TXWIEN: Transmit Watermark Interrupt Enable bit
1 = Triggers transmit buffer element watermark interrupt when TXMSK<5:0> = TXELM<5:0>
0 = Disables transmit buffer element watermark interrupt
bit 6
Unimplemented: Read as ‘0’
bit 5-0
TXMSK<5:0>: TX Buffer Mask bits(1,2,3,4)
TX mask bits; used in conjunction with the TXWIEN bit.
Note 1:
Mask values higher than FIFODEPTH are not valid. The module will not trigger a match for any value in
this case.
2:
RXMSK2 and TXMSK2 bits are only present when FIFODEPTH = 8 or higher.
3:
RXMSK3 and TXMSK3 bits are only present when FIFODEPTH = 16 or higher.
4:
RXMSK4 and TXMSK4 bits are only present when FIFODEPTH = 32.



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