DVR datasheet(75/416 Pages) MICROCHIP

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DS30010118D-page 75

PIC24FJ256GA705 FAMILY

EXAMPLE 6-1:

ERASING A PROGRAM MEMORY BLOCK (‘C’ LANGUAGE CODE)

// C example using MPLAB XC16

unsigned

long progAddr = 0xXXXXXX;

// Address of row to write

unsigned

int

offset;

//Set up pointer to the first memory location to be written

NVMADRU = progAddr>>16;

// Initialize PM Page Boundary SFR

NVMADR

= progAddr & 0xFFFF;

// Initialize lower word of address

NVMCON

= 0x4003;

// Initialize NVMCON

asm("DISI #5");

// Block all interrupts with priority <7

// for next 5 instructions

__builtin_write_NVM();

// check function to perform unlock

// sequence and set WR

TABLE 6-2:

CODE MEMORY PROGRAMMING EXAMPLE: ROW WRITES

Step 1: Set the NVMCON register to program 128 instruction words.

MOV

#0x4002, W0

MOV

W0, NVMCON

Step 2: Initialize the TBLPAG register for writing to the latches.

MOV

#0xFA, W12

MOV

W12, TBLPAG

Step 3: Load W0:W5 with the next four instruction words to program.

MOV

#<LSW0>, W0

MOV

#<MSB1:MSB0>, W1

MOV

#<LSW1>, W2

MOV

#<LSW2>, W3

MOV

#<MSB3:MSB2>, W4

MOV

#<LSW3>, W5

Step 4: Set the Read Pointer (W6) and load the (next set of) write latches.

CLR

TBLWTL

[W6++], [W7]

TBLWTH.B [W6++], [W7++]

TBLWTH.B [W6++], [++W7]

TBLWTL

[W6++], [W7++]

TBLWTL

[W6++], [W7]

TBLWTH.B [W6++], [W7++]

TBLWTH.B [W6++], [++W7]

TBLWTL

[W6++], [W7++]

Step 5: Repeat Steps 4 and 5, for a total of 32 times, to load the write latches with 128 instructions.

Step 6: Set the NVMADRU/NVMADR register pair to point to the correct address.

MOV

#DestinationAddress<15:0>, W3

MOV

#DestinationAddress<23:16>, W4

MOV

W3, NVMADR

MOV

W4, NVMADRU

Step 7: Execute the WR bit unlock sequence and initiate the write cycle.

MOV

#0x55, W0

MOV

W0, NVMKEY

MOV

#0xAA, W0

MOV

W0, NVMKEY

BSET

NVMCON, #WR

NOP

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