DVR datasheet(27/416 Pages) MICROCHIP

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DS30010118D-page 27

PIC24FJ256GA705 FAMILY

SCL1

I/O

I2C

I2C1 Synchronous Serial Clock Input/Output

SCL2

I/O

I2C

I2C2 Synchronous Serial Clock Input/Output

SDA1

I/O

I2C

I2C1 Data Input/Output

SDA2

I/O

I2C

I2C2 Data Input/Output

SOSCI

ANA/ST Secondary Oscillator/Timer1 Clock Input

SOSCO

ANA

Secondary Oscillator/Timer1 Clock Output

T1CK

Timer1 Clock

TCK

JTAG Test Clock/Programming Clock Input

TDI

JTAG Test Data/Programming Data Input

TDO

DIG

JTAG Test Data Output

TMPRN

Tamper Detect Input

TMS

JTAG Test Mode Select Input

VCAP

—

External Filter Capacitor

Connection (regulator enabled)

VDD

13, 28

10, 25

28, 40

30, 43

—

Positive Supply for Peripheral Digital Logic

and I/O Pins

VREF+

ANA

Comparator and A/D Reference Voltage

(high) Input

VREF-

ANA

Comparator and A/D Reference Voltage

(low) Input

VSS

8, 19, 27

5, 16, 24

6, 29, 39

6, 31, 42

—

Ground Reference for

Peripheral Digital Logic and I/O Pins

TABLE 1-3:

PIC24FJ256GA705 FAMILY PINOUT DESCRIPTIONS (CONTINUED)

Function

Pin Number/Grid Locator

I/O

Input

Buffer

Description

28-Pin SOIC,

SSOP, SPDIP

28-Pin QFN,

UQFN

44-Pin

TQFP

48-Pin

UQFN/TQFP

Legend:

TTL = TTL input buffer

ST = Schmitt Trigger input buffer

ANA = Analog level input/output

I2C = I2C/SMBus input buffer

DIG = Digital input/output

XCVR = Dedicated Transceiver

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