ST7293 datasheet(13/69 Pages) STMICROELECTRONICS

部件名	ST7293

功能描述	8-BIT MCU WITH 6K ROM, EEPROM AND 16-BIT TIMER WITH INPUT CAPTURE AND DUAL OUTPUT COMPARE

PDF	69 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

13 / 69 page

13/69

ST7294

RESET (Continued)

Table 4. Actions caused by RESET, Power-on Reset (POR), WAIT and HALT

Note 1: As can be seen in Table 4 above, WAIT mode only disables the CPU clock and not the Timer clock.

Figure 10. External Reset Timing Diagram

ACTION

RESET

POR

WAIT

HALT

Timer Prescaler reset to 0

Timer Counter set to FFFCh

All Timer enable bits reset to 0 (disabled)

Data Direction Registers reset to 0 (i.e. all I/O bits set as inputs)

Stack Pointer set to 00FFh

Internal Address Bus forced to Restart Vector

Interrupt Mask Bit (I-Bit, CCR) set to 1 (Interrupt disabled)

Interrupt Mask Bit (I-Bit, CCR) reset to 0 (Interrupt enabled)

HALT Latch reset

INT Latch reset

WAIT Latch reset

CPU Clock disabled (for 4096 clock cycles)

CPU Clock disabled(1)

-X

Timer Clock disabled(1)

-X

SM bit cleared

Watchdog Counter Rest

Watchdog WDOG bit reset

EEPROM control bits reset

3FFEh

3FFF

NEW PC

CPU CLOCK

CPU RESET

RESET

OSC

VR02046B

ST7293 数据表(PDF) 13 Page - STMicroelectronics

ST7293 数据表(HTML) 13 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69

数据表下载