ST7293 datasheet(21/69 Pages) STMICROELECTRONICS

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ST7294

4 ON-CHIP PERIPHERALS

4.1 EEPROM

4.1.1 Introduction

The ST7294 MCU includes a 256 byte EEPROM

memory for temporary data storage.

4.1.2 Functional Description

An internal charge pump avoids the need for an

external high voltage supply for the EEPROM

erasure and programming functions.

8 data registers allow simultaneous write or erase

of 1 to 8 bytes in the EEPROM array.

As shown on Figure 16, the EEPROM is organ-

ised as an array composed of 8 columns by 32

rows. Rows are selected by bits A7, A6, A5, A4,

A3, while columns are associated with the bits in

an 8-bit data register.

4.1.3 Read Operation (E2LAT=0).

The EEPROM can be read just as a normal ROM

when the E2LAT bit of the Control Register is low.

When E2LAT is low, the E2PGM and E2ERA bits

are also forced low.

4.1.4 Erase/Write Operation (E2LAT=1)

When E2LAT is set to 1, a write to an EEPROM lo-

cation latches the data in the 8-bit register corre-

sponding to the decoded column and marks the

decoded row.

As there are 8 columns in each row, up to 8 loca-

tions (having the same A7, A6, A5, A4, A3 ad-

dress bits) may be written or erased simultane-

ously.

To erase bytes: set the E2LAT and E2ERA bits,

write to the EEPROM addresses to be erased (da-

ta value is not significant), and then set the

E2PGM bit to turn the charge pump on.

To write bytes: set the E2LAT bit, write the data in

the appropriate EEPROM addresses, and then set

the E2PGM bit to turn the charge pump on.

Figure 16. EEPROM Block Diagram

HIGH VOLTAGE PUMP

ADDRESS

DECODER

LATCH

AMPLI

8 COLUMNS

VR001106

RESERVED

E2PGM

E2ERA

EEPROM CONTROL REGISTER

E2LAT

EEPROM

MEMORY

ARRAY

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