ST7293 datasheet(20/69 Pages) STMICROELECTRONICS

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ST7294

LOW POWER MODES (Continued)

3.6.1 HALT Mode

The HALT Power Saving mode is the lowest pow-

er consumption mode. The HALT mode is entered

by executing the HALT instruction. The internal

oscillator is then turned off, causing all internal

processing to be stopped, including the operation

of the on-chip peripherals.

When entering the HALT mode, the I bit in the

Condition Code Register is cleared. Interrupts are

thus enabled and, on receiving an interrupt, the

MCU will be restarted and will run at its nominal

speed (see Section 3.1 CLOCK SYSTEM). All oth-

er registers and memory remain unaltered and all

I/O lines remain unchanged.

The MCU can exit the HALT mode upon reception

of either an external interrupt, a PORT B derived

interrupt, or a power-on or external reset. The os-

cillator is then enabled and a stabilization delay is

initiated before enabling CPU operation. The sta-

bilization time period is equivalent to 4096 CPU

clock cycles.

After the start-up delay, the CPU then proceeds to

service the interrupt which has woken it up by

fetching the relevant Interrupt Vector.

3.6.2 WAIT Mode

This mode is a Power Saving mode, but the power

consumption is higher than in the HALT mode.

The WFI instruction places the MCU in the WAIT

mode; in this mode, the internal clock remains ac-

tive but all CPU processing is stopped.

While in the WAIT mode, the I bit in the Condition

Code register is cleared in order to enable all inter-

rupts. All other registers and memory remain unal-

tered and all parallel I/O lines remain unchanged.

An interrupt or a reset causes the MCU to exit the

WAIT mode. An interrupt while the MCU is in this

mode causes the corresponding interrupt vector to

be fetched, the interrupt routine to be executed

and normal processing to resume. A reset causes

the program counter to fetch the reset vector and

processing starts as for a normal reset.

3.6.3 DATA RETENTION Mode

The RAM contents and the CPU registers are re-

tained even with supply voltages as low as 2.0V.

This is referred to as the Data Retention mode. In

this mode Data is protected but the device is not

guaranteed to operate.

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