ST7293 datasheet(36/69 Pages) STMICROELECTRONICS

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ST7294

5.3 ST7 INSTRUCTION SET

The ST7 family devices use an Instruction Set consisting of 63 instructions. The instructions may be sub-

divided into 13 main groups as illustrated in the following table:

Load and Transfer

CLR

Stack operation

PUSH

POP

RSP

Increment/Decrement

INC

DEC

Compare and Tests

TNZ

BCP

Logical operations

AND

XOR

CPL

NEG

Bit Operation

BSET

BRES

Conditionnal Bit Test and Branch

BTJT

BTJF

Arithmetic operations

ADC

ADD

SUB

SBC

MUL

Shift and Rotates

SLL

SRL

SRA

RLC

RRC

SWAP

SLA

Unconditionnal Jump or Call

JRA

JRT

JRF

CALL

CALLR

NOP

RET

Conditionnal Branch

JRxx

Interruption management

TRAP

WFI

HALT

IRET

Code Condition Flag modification

SIM

RIM

SCF

RCF

Using a pre-byte

The instructions are described with one to four op-

codes.

In order to extend the number of available op-

codes for an 8-bit CPU (256 op-codes), three dif-

ferent prebyte opcodes are defined. These preb-

ytes modify the meaning of the instruction they

precede.

The whole instruction becomes:

PC-2

End of previous instruction

PC-1

Prebyte

Op-code

PC+1

Additional word (0 to 2) according

to the number of bytes required to

compute the effective address

These prebytes enable instruction in Y as well as

indirect addressing modes to be implemented.

They precede the opcode of the instruction in X or

the instruction using direct addressing mode. The

prebytes are:

PDY 90

Replace an X based instruction

using immediate, direct, indexed

or inherent addressing mode by a

Y one.

PIX 92

Replace an instruction using di-

rect, direct bit, or direct relative

addressing mode to an instruction

using the corresponding indirect

addressing mode.

It also changes an instruction us-

ing X indexed addressing mode to

an instruction using indirect X in-

dexed addressing mode.

PIY 91

Replace an instruction using indi-

rect X indexed addressing mode

by a Y one.

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