TDA4VL...ALZQ1 datasheet(184/251 Pages) TI

184 / 251 page

NO.

PARAMETER

MODE(15)

MIN

MAX

UNIT

133 MHz(16)

GNF6 tw(wenIV-CSn[i]V) Delay time, output write enable GPMC_WEn

invalid to output chip select GPMC_CSn[i](13)

invalid

div_by_1_mode;

GPMC_FCLK_MUX;

TIMEPARAGRANULARITY_

G(7) - 2.55

G(7)+

2.65

GNF7 tw(aleH-wenV)

Delay time, output address valid and address latch

enable GPMC_ADVn_ALE high to output write

enable GPMC_WEn valid

div_by_1_mode;

GPMC_FCLK_MUX;

TIMEPARAGRANULARITY_

C(3) - 2.55

C(3)+

2.65

GNF8 tw(wenIV-aleIV)

Delay time, output write enable GPMC_WEn

invalid to output address valid and address latch

enable GPMC_ADVn_ALE invalid

div_by_1_mode;

GPMC_FCLK_MUX;

TIMEPARAGRANULARITY_

F(6) - 2.55 F(6)+ 2.65

GNF9 tc(wen)

Cycle time, write

div_by_1_mode;

GPMC_FCLK_MUX;

TIMEPARAGRANULARITY_

H(8)

GNF10 td(csnV-oenV)

Delay time, output chip select GPMC_CSn[i](13)

valid to output enable GPMC_OEn_REn valid

div_by_1_mode;

GPMC_FCLK_MUX;

TIMEPARAGRANULARITY_

I(9) - 2.55 I(9)+ 2.65

GNF13 tw(oenV)

Pulse duration, output enable GPMC_OEn_REn

valid

div_by_1_mode;

GPMC_FCLK_MUX;

TIMEPARAGRANULARITY_

K(10)

GNF14 tc(oen)

Cycle time, read

div_by_1_mode;

GPMC_FCLK_MUX;

TIMEPARAGRANULARITY_

L(11)

GNF15 tw(oenIV-CSn[i]V)

Delay time, output enable GPMC_OEn_REn

invalid to output chip select GPMC_CSn[i](13)

invalid

div_by_1_mode;

M(12) - 2.55

M(12)+

2.65

(1)

A = (WEOffTime - WEOnTime) × (TimeParaGranularity + 1) × GPMC_FCLK(14)

(2)

B = ((WEOnTime - CSOnTime) × (TimeParaGranularity + 1) + 0.5 × (WEExtraDelay - CSExtraDelay)) × GPMC_FCLK(14)

(3)

C = ((WEOnTime - ADVOnTime) × (TimeParaGranularity + 1) + 0.5 × (WEExtraDelay - ADVExtraDelay)) × GPMC_FCLK(14)

(4)

D = (WEOnTime × (TimeParaGranularity + 1) + 0.5 × WEExtraDelay) × GPMC_FCLK(14)

(5)

E = ((WrCycleTime - WEOffTime) × (TimeParaGranularity + 1) - 0.5 × WEExtraDelay) × GPMC_FCLK(14)

(6)

F = ((ADVWrOffTime - WEOffTime) × (TimeParaGranularity + 1) + 0.5 × (ADVExtraDelay - WEExtraDelay)) × GPMC_FCLK(14)

(7)

G = ((CSWrOffTime - WEOffTime) × (TimeParaGranularity + 1) + 0.5 × (CSExtraDelay - WEExtraDelay)) × GPMC_FCLK(14)

(8)

H = WrCycleTime × (1 + TimeParaGranularity) × GPMC_FCLK(14)

(9)

I = ((OEOnTime - CSOnTime) × (TimeParaGranularity + 1) + 0.5 × (OEExtraDelay - CSExtraDelay)) × GPMC_FCLK(14)

(10) K = (OEOffTime - OEOnTime) × (1 + TimeParaGranularity) × GPMC_FCLK(14)

(11) L = RdCycleTime × (1 + TimeParaGranularity) × GPMC_FCLK(14)

(12) M = ((CSRdOffTime - OEOffTime) × (TimeParaGranularity + 1) + 0.5 × (CSExtraDelay - OEExtraDelay)) × GPMC_FCLK(14)

(13) In GPMC_CSn[i], i is equal to 0, 1, 2 or 3.

(14) GPMC_FCLK is general-purpose memory controller internal functional clock period in ns.

(15) For div_by_1_mode:

•

GPMC_CONFIG1_i Register: GPMCFCLKDIVIDER = 0h:

–

GPMC_CLK frequency = GPMC_FCLK frequency

For GPMC_FCLK_MUX:

•

CTRLMMR_GPMC_CLKSEL[1-0] CLK_SEL = 00 = CPSWHSDIV_CLKOUT3 = 2000/15 = 133.33 MHz

For TIMEPARAGRANULARITY_X1:

•

GPMC_CONFIG1_i Register: TIMEPARAGRANULARITY = 0h = x1 latencies (affecting RD/WRCYCLETIME, RD/

WRACCESSTIME, PAGEBURSTACCESSTIME, CSONTIME, CSRD/WROFFTIME, ADVONTIME, ADVRD/WROFFTIME,

OEONTIME, OEOFFTIME, WEONTIME, WEOFFTIME, CYCLE2CYCLEDELAY, BUSTURNAROUND, TIMEOUTSTARTVALUE,

WRDATAONADMUXBUS)

(16) For 133 MHz:

•

CTRLMMR_GPMC_CLKSEL[1-0] CLK_SEL = 00 = MAIN_PLL0_HSDIV3_CLKOUT

TDA4VE-Q1, TDA4AL-Q1, TDA4VL-Q1

SPRSP62 – DECEMBER 2022

www.ti.com

184

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