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KSZ9563RNXI-TR 数据表(PDF) 162 Page - Microchip Technology |
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KSZ9563RNXI-TR 数据表(HTML) 162 Page - Microchip Technology |
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162 / 226 page  KSZ9563R DS00002419D-page 162 2017-2018 Microchip Technology Inc. 5.2.6.8 Port ACL Access 7 Register 5.2.6.9 Port ACL Access 8 Register 5.2.6.10 Port ACL Access 9 Register 5.2.6.11 Port ACL Access A Register Address: 0xN607 Port N: 1-3 Size: 8 bits Bits Description Type Default 7:0 MAC Address [7:0] R/W 0x00 Address: 0xN608 Port N: 1-3 Size: 8 bits Bits Description Type Default 7:0 EtherType [15:8] R/W 0x00 Address: 0xN609 Port N: 1-3 Size: 8 bits Bits Description Type Default 7:0 EtherType [7:0] R/W 0x00 Address: 0xN60A Port N: 1-3 Size: 8 bits Bits Description Type Default 7:6 Priority Mode (PM) R/W 00b 5:3 Priority R/W 00_0b 2 Remark Priority Enable (RPE) R/W 0b 1:0 Remark Priority [2:1] The two MSB of the 3-bit Remark Priority field. Refer to the Port ACL Access B Register for the LSB. R/W 00b |
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