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SAM9X60SIP 数据表(PDF) 6 Page - Microchip Technology |
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SAM9X60SIP 数据表(HTML) 6 Page - Microchip Technology |
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6 / 40 page ![]() 1. DDR2-SDRAM Features • Part Numbers: – 1-Gbit DDR2-SDRAM device (SAM9X60D1G-I): Winbond W971G16SG2-5I – 512-Mbit DDR2-SDRAM device (SAM9X60D5M-I): Winbond W975116KG2-5I • Power Supply: DDRM_VDD = 1.8V ±0.1V • Double Data Rate Architecture: Two Data Transfers per Clock Cycle • CAS Latency: 3 • Burst Length: 8 • Bi-Directional, Differential Data Strobes (DQS and DQSN) are Transmitted/Received with Data • Edge-Aligned with Read Data and Center-Aligned with Write Data • DLL Aligns DQ and DQS Transitions with Clock • Differential Clock Inputs (CLK and CLKN) • Data Masks (DM) for Write Data • Commands Entered on Each Positive CLK Edge, Data and Data Mask are Referenced to Both Edges of DQS • Auto-Refresh and Self-Refresh Modes • Precharged Power-Down and Active Power-Down • Write Data Mask • Write Latency = Read Latency - 1 (WL = RL - 1) • Interface: SSTL_18 SAM9X60 SIP DDR2-SDRAM Features © 2021 Microchip Technology Inc. and its subsidiaries Datasheet DS60001580C-page 6 |
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