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SAM9X60SIP 数据表(PDF) 9 Page - Microchip Technology

部件名 SAM9X60SIP
功能描述  SAM9X60 System-In-Package (SIP) MPU with up to 1 Gbit DDR2 SDRAM and up to 64 Mbits SDR-SDRAM
PDF  40 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

SAM9X60SIP 数据表(HTML) 9 Page - Microchip Technology

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4.
Block Diagram
Figure 4-1. SAM9X60 SIP Series Block Diagram
In-Circuit Emulator
ARM926EJ-S
DCache
32 Kbytes
ICache
32 Kbytes
MMU
Bus Interface Unit
Key
Digital
Analog
Memories
PIO
Backup Area
Processor and
Crypto-accelerators
M
Matrix Master
S
Matrix Slave
M
M
S
S
S
S
M
M
M
M
M
M
M
M
M
Multi-
Layer
AHB
MATRIX
S
S
S
S
ID
S
SRAM0
(64 Kbytes)
ROM
(96 KB +
64 KB)
OTP memory
(11 KB)
USB HOST
HS EHCI
FS OHCI
PC
PB
PA
HS
Trans
HS
Trans
HS
Trans
HS USB
DHSDP / HHSDPA
DHSDM / HHSDMA
HHSDPB
HHSDMB
HHSDPC
HHSDMC
A[20:25]
NANDALE, NANDCLE
NANDOE, NANDWE
D[16:31]
NANDCS
NWAIT
NCS2..5
EBI
SMC
PMECC
PMERRLOC
SDRC
+
MPDDRC
PWM
12-bit
12-channel
ADC
CAN
(x2)
ISI
LCDC
EMAC0
EMAC1
(RMII)
E0_TXCK, E0_RXCK
E0_TXEN, E0_TXER
E0_TX[3:0], E0_MDC
E0_CRS, E0_COL, E0_RX[3:0]
E0_RXER, E0_RXDV
E0_MDIO
E1_REFCK, E1_RXER
E1_TXEN, E1_TX[1:0]
E1_CRSDV, E1_RX[1:0]
E1_MDIO
SDMMC
(x2)
SDMMCx_CMD
SDMMCx_CK
SDMMCx_DAT[3:0]
E1_MDC
LCDDAT[23:0]
LCDVSYNC, LCDHSYNC
LCDPCLK, LCDEN
LCDDISP, LCDPWM
ISI_D[11/0]
ISI_PCK
ISI_HSYNC, ISI_VSYNC
ISI_MCK
GFX2D
QSPI
QSCK
QCS
QIO0..3
Peripheral
Bridge
PWM0..3
CANTXx
CANRXx
AD0..11
ADTRG
Peripheral
Bridge
PIO
JTAG
Boundary
Scan
JTAGSEL
TMS, TCK
TDI
TDO, RTCK
TC
32-bit Timer
(x6)
TIOAx, TIOBx
TCLKx
PIO
A – D
AIC
DBGU
PMC
PIT64B
(64-b Timer)
WDT
GPBR
(8 x 32)
RTC /
RTT
RSTC
SHDWC
PLLA
UPLL
SLOW RC
OSC.
32768 Hz
XTAL OSC
Main RC
OSC
Main XTAL
OSC
Clock Generator
VDDCORE
POR
VDDBU
POR
VDDIN33
POR
VDDOUT25
REG
Clock
Sources
System Clocks
System Controller
FLEXCOM
(USART / SPI / TWI)
0–3 & 6–10
(x9)
FLEXCOMx_IO0..7
M
M
DDR_CAL
OTPC
M
SRAM1
(4 Kbytes)
S
M
XDMA
TRNG
TDES
AES
SHA
SSC
RF, RK
RD
TD
TF, TK
FLEXCOMx_IO0..7
CLASSD
CLASSD_L0..3
I2SMCC
I2SMCC_MCK, I2SMCC_ DO
I2SMCC_WS, I2SMCC_CK
I2SMCC_DIN
RTUNE
NTRST
PIO
Private
Key Bus
(Dynamic Memory
Controller)
Backup Area
ADVREFP, ADVREFN
FLEXCOM
(USART / SPI / TWI)
4–5 & 11–12
(x4)
SDR-
SDRAM
or
DDR2-
SDRAM
DDR_VREF
SAM9X60 SIP
Block Diagram
© 2021 Microchip Technology Inc.
and its subsidiaries
Datasheet
DS60001580C-page 9



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