AD9511SLASHPCB datasheet(20/60 Pages) AD

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AD9511

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Table 13. Pin Function Descriptions

Pin No.

Mnemonic

Description

REFIN

PLL Reference Input.

REFINB

Complementary PLL Reference Input.

3, 6, 9, 18, 22,

23, 25, 28, 29,

32, 33, 36, 39,

40, 44, 48

Power Supply (3.3 V).

VCP

Charge Pump Power Supply. It should be greater than or equal to VS.

VCP can be set as high as 5.5 V for VCOs, requiring extended tuning range.

Charge Pump Output.

CLK2

Clock Input. Used to connect external VCO/VCXO to feedback divider, N. CLK2 also drives the

distribution section of the chip and may be used as a generic clock input when PLL is not used.

CLK2B

Complementary Clock Input. Used in conjunction with CLK2.

CLK1

Clock Input. Drives distribution section of the chip.

CLK1B

Complementary Clock Input. Used in conjunction with CLK1.

FUNCTION

Multipurpose Input. May be programmed as a reset (RESETB), sync (SYNCB), or power-down (PDB) pin.

This pin is internally pulled down by a 30 kΩ resistor. If this pin is left NC, the part is in reset by default.

To avoid this, connect this pin to VS with a 1 kΩ resistor.

STATUS

Output Used to Monitor PLL Status and Sync Status.

SCLK

Serial Data Clock.

SDIO

Serial Data I/O.

SDO

Serial Data Output.

CSB

Serial Port Chip Select.

19, 24, 37,

38, 43, 46

GND

Ground.

OUT2B

Complementary LVPECL Output.

OUT2

LVPECL Output.

OUT1B

Complementary LVPECL Output.

OUT1

LVPECL Output.

OUT4B

Complementary LVDS/Inverted CMOS Output. OUT4 includes a delay block.

OUT4

LVDS/CMOS Output. OUT4 includes a delay block.

OUT3B

Complementary LVDS/Inverted CMOS Output.

OUT3

LVDS/CMOS Output.

OUT0B

Complementary LVPECL Output.

OUT0

LVPECL Output.

RSET

Current Set Resistor to Ground. Nominal value = 4.12 kΩ.

CPRSET

Charge Pump Current Set Resistor to Ground. Nominal value = 5.1 kΩ.

Note that the exposed paddle on this package is an electrical connection as well as a thermal enhancement. For the device to

function properly, the paddle must be attached to ground, GND.

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