Data Sheet
RSC-4128
35
P/N 80-0206-R
© 2006 Sensory Inc.
Instruction Set Opcodes and Timing Details
The RSC-4128 instruction set has 60 instructions comprising 13 move, 7 rotate/shift, 11 jump/branch, 13 register
arithmetic, 9 immediate arithmetic, and 7 miscellaneous instructions. All instructions are 3 bytes or fewer, and no
instruction requires more than 10 clock cycles (plus wait states) to execute. The column “Cycles” indicates the
number of clock cycles required for each instruction when operating with zero wait states. Wait states may be
added to lengthen all accesses to external addresses or to the internal ROM (but not internal SRAM). The column
“+Cycles/Waitstate” shows the number of additional cycles added for each additional wait state. Opcodes are in
HEX.
MOVE Group Instructions
Register-indirect instructions accessing code (MOVC), data (MOVX), technology (MOVY) or register (MOV) space
locations use an 8-bit operand (“@source” or “@dest”) to designate an SRAM register pointer to the 16-bit target
address. The “source” or “dest” indirect pointer register must be at an even address unless it is a 8-bit pointer
(indirect MOV). The LOW byte of the target address is contained at the pointer address, and the HIGH byte of the
target address is contained at the pointer address+1. Unless the flags register is the destination, the carry, sign,
and zero flags are not affected by MOV instructions.
Instruction Opcode Operand 1
Operand 2
Description
Bytes Cycles +Cycles/Waitstate
MOV
10
dest
Source
register to register
3
5
3
MOV
11
@dest
Source
register to register-indirect 3
5
3
MOV
12
dest
@source
register-indirect to register 3
6
3
MOV
13
dest
#immed
immediate data to register 3
4
3
MOVC
14
dest
@source
code space to register
3
7
4
MOVC
15
@dest
Source
register to code space
3
8
4
MOVX
16
dest
@source
data space to register
3
7
4*
MOVX
17
@dest
Source
register to data space
3
8
4*
POP
18
dest
@++source
register to register data
stack pop (source pre-
incremented)
3
10
3
PUSH
19
@dest--
Source
register to register data
stack push (dest post-
decremented)
3
9
3
MOVY
1A
dest
@source
RAMY to register, indirect
3
7
3
MOVY
1B
@dest
source
Register to RAMY, indirect 3
7
3
MOVD
1C
dest_pair
source_pair
register to register, direct,
16-bit MOV
3
7
3
* If register D6.Bit 5=1 (movX_4ws) and external read/write memory is selected by setting the “rw” bit (register D2.Bit4), MOVX
instructions have four additional wait states.
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