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DP83255AVF 数据表(PDF) 72 Page - National Semiconductor (TI) |
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DP83255AVF 数据表(HTML) 72 Page - National Semiconductor (TI) |
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72 / 96 page  60 Pin Descriptions (Continued) PHY PORT INTERFACE (Continued) Symbol Pin No IO Description BIP 109 O PHY Port B Indicate Parity A TTL output signal representing odd parity for the 10-bit wide Port B Indicate signals (BIP BIC and BIDk70l) BIC 107 O PHY Port B Indicate Control A TTL output signal indicating that the two 4-bit symbols (BIDk74l and BIDk30l) are either control symbols (BIC e 1) or data symbols (BIC e 0) BID7 105 O PHY Port B Indicate Data TTL output signals representing the first 4-bit datacontrol symbol BID6 103 BID5 100 BID7 is the most significant bit and BID4 is the least significant bit of the first symbol BID4 97 BID3 94 O PHY Port B Indicate Data TTL output signals representing the second 4-bit data control symbol BID2 92 BID1 90 BID3 is the most significant bit and BID0 is the least significant bit of the second symbol BID0 88 BRP 110 I PHY Port B Request Parity A TTL input signal representing odd parity for the 10-bit wide Port B Request signals (BRP BRC and BRDk70l) BRC 108 I PHY Port B Request Control A TTL input signal indicating that the two 4-bit symbols (BRDk74l) and BRDk30l) are either control symbols (BRC e 1) or data symbols (BRC e 0) BRD7 106 I PHY Port B Request Data TTL input signals representing the first 4-bit datacontrol symbol BRD6 104 BRD5 101 BRD7 is the most significant bit and BRD4 is the least significant bit of the first symbol BRD4 98 BRD3 95 I PHY Port B Request Data TTL input signals representing the second 4-bit datacontrol symbol BRD2 93 BRD1 91 BRD3 is the most significant bit and BRD0 is the least significant bit of the second symbol BRD0 89 72 |
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