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AD5667-RBRMZ-2 数据表(PDF) 15 Page - Analog Devices

部件名 AD5667-RBRMZ-2
功能描述  Dual, 12-/14-/16-Bit nanoDACs with 5ppm/C On-Chip Ref, I2C Interface
PDF  30 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD5667-RBRMZ-2 数据表(HTML) 15 Page - Analog Devices

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Preliminary Technical Data
AD5627R/AD5647R/AD5667R, AD5627/AD5667
Rev. PrA. | Page 15 of 30
CURRENT (mA)
6
5
4
3
2
1
–1
0
–30
–20
–10
0
10
20
30
VDD = 5V
VREFOUT = 2.5V
TA = 25°C
ZERO SCALE
FULL SCALE
MIDSCALE
1/4 SCALE
3/4 SCALE
Figure 34. AD56x7R with 2.5V Reference, Source and Sink Capability
CURRENT (mA)
4
–1
0
1
2
3
–30
–20
–10
0
10
20
30
VDD = 3V
VREFOUT = 1.25V
TA = 25°C
ZERO SCALE
FULL SCALE
MIDSCALE
1/4 SCALE
3/4 SCALE
Figure 35. AD56x7 with 1.25V Reference, Source and Sink Capability
TEMPERATURE (°C)
0.50
0.05
0.10
0.15
0.20
0.35
0.40
0.25
0.30
0.45
0
–40
–20
0
20
40
60
80
100
TA = 25°C
VDD = VREFIN = 5V
VDD = VREFIN = 3V
Figure 36. Supply Current vs. Temperature
TIME BASE = 4µs/DIV
VDD = VREF = 5V
TA = 25°C
FULL-SCALE CODE CHANGE
0x0000 TO 0xFFFF
OUTPUT LOADED WITH 2kΩ
AND 200pF TO GND
VOUT = 909mV/DIV
1
Figure 37. Full-Scale Settling Time, 5 V
CH1 2.0V
CH2 500mV
M100µs 125MS/s
A CH1
1.28V
8.0ns/pt
VDD = VREF = 5V
TA = 25°C
VOUT
VDD
1
2
MAX(C2)
420.0mV
Figure 38. Power-On Reset to 0 V
VDD = 5V
SYNC
SLCK
VOUT
1
3
CH1 5.0V
CH3 5.0V
CH2 500mV
M400ns
A CH1
1.4V
2
Figure 39. Exiting Power-Down to Midscale



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